Post AwT0JB0jGKitXVgUU4 by [email protected] | |
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Post #AwT0JAtdgh3HBWMpQu by [email protected] | |
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Well the #PC104 #Tranputet link board is assembled. And it sort of works. I … | |
Post #AwT0JB0jGKitXVgUU4 by [email protected] | |
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The big problem is, there isn’t much in the way of documentation as to what s… | |
Post #AwT0JB76sbpLrIfaQi by [email protected] | |
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@PaulaMaddox it is only bit 0 for the ports 0x160/0x161. Everything else will b… | |
Post #AwT0JBD8WCeE9zUOp6 by [email protected] | |
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@nanochess thanks. That’s what I figured. My design is sadly not working. A… | |
Post #AwT0JBIoB7BWRa8vfE by [email protected] | |
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@PaulaMaddox I noticed a mix-up in your test. For the Inmos C011, 0x150 is data… | |
Post #AwT0JBPBnOHylN81bs by [email protected] | |
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@nanochess correct, I didn't explain myself very well.Here is where I am wi… | |
Post #AwT0JBWdLiFB8SbyDI by [email protected] | |
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@nanochess And this is what I get with the TRAM installed :(Note the wrong thin… | |
Post #AwT0JBdMwfdDTLlLiC by [email protected] | |
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@PaulaMaddox I don't understand the purpose of writing 0x152 and 0x153 with… | |
Post #AwT0KSXlYr5eCqkURk by [email protected] | |
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@nanochess the 0152 and 0153 disable interrupts for input and output. And yes … |