Post Agm3AGchJLNBEwEJrk by [email protected] | |
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Post #AglGs3idkoUcCqGHCK by [email protected] | |
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is assembly language (for the sake of argument, x86 assembly as understood by a… | |
Post #AglH5yjB6mhcmQ9OLo by [email protected] | |
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@whitequark Sure, you've got the GPR type and the SSE/AVX/etc type. | |
Post #AglH5ymitbXQxPoDsO by [email protected] | |
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@steve right! that's my take on it as well. but I've also seen assembly… | |
Post #AglHSTz1a7GM5XIFE0 by [email protected] | |
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@bob why?is the C language typed? why? | |
Post #AglHVTeDHn8LuqzFbs by [email protected] | |
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@whitequark I would argue yes. Different registers/names for different sizes an… | |
Post #AglHWz188jixUrQMk4 by [email protected] | |
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@[email protected] not really | |
Post #AglHWz5Nsv7vi3PlNA by [email protected] | |
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@julia why?is the C language typed? why? | |
Post #AglHgYXDSKjwG5zraC by [email protected] | |
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@whitequark @steve On the most basic level, it’s all bytes and bits. I’d ca… | |
Post #AglHgYcX8YzeWaU6s4 by [email protected] | |
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@tsturm @steve on the most basic level Rust is all bytes and bits (types are er… | |
Post #AglHtoeOqgu80PgCu0 by [email protected] | |
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@bob what is an example of a typed language? | |
Post #AglI2RtSpPqG23qI9w by [email protected] | |
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@whitequark there are types that show up here and there (fpu registers, for ins… | |
Post #AglI2RxiZbFEFFpgn2 by [email protected] | |
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@tomoyo but we don't call C untyped even though stdio is untypedin other wo… | |
Post #AglI2S1yJmeCSRp5Q8 by [email protected] | |
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@whitequark not sure what you mean by as "stdio is untyped"it defines… | |
Post #AglI2S6E3y3AfdoU3E by [email protected] | |
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@tomoyo sorry, by stdio i mean "the data exchanged over fds 0, 1, and 2&qu… | |
Post #AglIKpDiq3ovaj53Mu by [email protected] | |
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@bob if we're talking about the level of individual language features, C ha… | |
Post #AglINtaJ4KmRzn6lwu by [email protected] | |
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@[email protected] assembly works on bytes, you can tell it to use a f… | |
Post #AglINteunCT0E5GS8G by [email protected] | |
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@julia how would you use e.g. pshufb on an integer register (say, eax)? | |
Post #AglIQgqwrRszNVE0PI by [email protected] | |
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@tsturm @whitequark This would be equally true for C though. It's all char … | |
Post #AglIQguqcx0NZb37U8 by [email protected] | |
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@steve @tsturm should we be talking about strict aliasing here | |
Post #AglIiU4Z7JA4x94xGa by [email protected] | |
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@[email protected] I don't mean a register when I say integer, I m… | |
Post #AglIiU8orUZ3AL4Ltg by [email protected] | |
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@[email protected] for whatever it's worth, I see C as weakly typed | |
Post #AglIiUD4bfy1NX3kWm by [email protected] | |
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@julia are registers the same type as memory? | |
Post #AglIs2j7dvML2Mbhfk by [email protected] | |
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@[email protected] not really | |
Post #AglIs2nNO6lJFYb6Iq by [email protected] | |
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@julia so, that's at least two different types then? | |
Post #AglIws2ymFu5MXCHdQ by [email protected] | |
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@whitequark @steve Yeah, but the *language* (Rust or C) has types. Assembly (at… | |
Post #AglIws7aV7adapLxom by [email protected] | |
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@tsturm @steve is assembly not a kind of programming language? (you'll note… | |
Post #AglJ0wNwaePJyWwaIa by [email protected] | |
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@whitequark I'd say that whether assembly language is typed has less to do … | |
Post #AglJ0wRqM9WiAclhNQ by [email protected] | |
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@sjolsen i've mentioned strict aliasing at least twice in this thread and y… | |
Post #AglJ9YHhZ6hvpo88hs by [email protected] | |
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@[email protected] they're not really types? they're just diff… | |
Post #AglJ9YLbKbpK1txFmi by [email protected] | |
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@julia but i'm not talking about hardware (indeed, nothing requires that x8… | |
Post #AglJBMxOeSblHYV1FI by [email protected] | |
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@whitequark hmm, would you consider "value has to be known at compiletime&… | |
Post #AglJEPo2W0QKzGZiOu by [email protected] | |
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@8051enthusiast this just in: x86 assembly stabilized const generics decades be… | |
Post #AglJJZLOTreG15dMB6 by [email protected] | |
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@[email protected] I suppose there are "types" in the abstra… | |
Post #AglJJZPeE33EEHckoC by [email protected] | |
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@julia what's a true CPU instruction set? | |
Post #AglJUDlR3SdiGytTOq by [email protected] | |
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@whitequark :blobcatchristmasglowsticks: I also think one has to be careful to … | |
Post #AglJUDq2mKKGVH39aC by [email protected] | |
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@sjolsen how do i use an x86 CPU to operate on a bitstring? | |
Post #AglJZgJqJczoHZaixM by [email protected] | |
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@whitequark idk, i think a lot of the code either way is dedicated to manipulat… | |
Post #AglJZgOo1AxwWxuggy by [email protected] | |
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@tomoyo but isn't this the same as what most of your assembly code is doing… | |
Post #AglJfeAlD1ZvMYBhAW by [email protected] | |
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@[email protected] whatever instruction set is used by the CPU after i… | |
Post #AglJfeFMvtGTaqLNLs by [email protected] | |
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@julia is that something that exists? if it does, why is it more important than… | |
Post #AglJufbu95TWAL31EW by [email protected] | |
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@[email protected] Most modern CPUs don't actually execute x86 ins… | |
Post #AglJuffnuaauMQs8JM by [email protected] | |
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@julia can you show me an example of an instruction in that ISA for any x86 CPU… | |
Post #AglKJA6uOmFDi5EDJI by [email protected] | |
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@[email protected] they're usually proprietary and not very well d… | |
Post #AglKJABA8xeBvHDbwO by [email protected] | |
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@julia if you can't name a single instruction from it how can you be certai… | |
Post #AglKR7n8u5xYppmP5M by [email protected] | |
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@whitequark are you asking a functional question or an ontological question? th… | |
Post #AglKR7rOeHMX31lniS by [email protected] | |
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@sjolsen I'm actually questioning the word "bitstring", because i… | |
Post #AglKUAlaIe0uvjVKOe by [email protected] | |
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@whitequark sure but in C you're can't just take this random memory loc… | |
Post #AglKUAqY0Bz3B7pI8G by [email protected] | |
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@whitequark or if you try to call fprintf() with a pointer to `struct banana`, … | |
Post #AglKUAuRlh6RNDePD6 by [email protected] | |
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@tomoyo if you do the equivalent of it in assembly you get a segfault too | |
Post #AglKaVmD671npTosQy by [email protected] | |
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@[email protected] okay, thats just outright conspiratorial- it's … | |
Post #AglKaVqSqIQm2foH44 by [email protected] | |
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@julia it's not, you're just repeating something you have no evidence o… | |
Post #AglKmwRzkZyM23I7Sy by [email protected] | |
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@julia an ISA is a contract between a producer and a consumer. in an x86 CPU, t… | |
Post #AglKoHy7ERz13hxRYW by [email protected] | |
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@[email protected] whatever, I'm playing stardew. I don't care… | |
Post #AglKoI2MydNzGtwqBc by [email protected] | |
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@julia that's just outright false | |
Post #AglL20DQ2DHO3JefQ0 by [email protected] | |
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@[email protected] google intel management engine and scheduler | |
Post #AglL20I1l4xwHboLbM by [email protected] | |
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@julia so, you're telling me that if I take apart the ME firmware image for… | |
Post #AglLNG1cRwyPAOGr0i by [email protected] | |
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@whitequark oh, I see. I just mean that the abstract machine encodes all data a… | |
Post #AglLNG5sC8NNNaGFdo by [email protected] | |
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@sjolsen ohhh I see, so if you replace "bitstring" with "bytestr… | |
Post #AglLNI4ArQCnUtTvGq by [email protected] | |
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@whitequark ig the less-tryhard way of wording this is "it's all just … | |
Post #AglLYKGv06ovWUhl68 by [email protected] | |
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@whitequark i think it depends on what structures you're modifying with ass… | |
Post #AglLebhH7y2ZIt1nge by [email protected] | |
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@[email protected] @[email protected] Yes. Because intel themselves have … | |
Post #AglLeblWs9RXW51CJk by [email protected] | |
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@[email protected] @[email protected] And while these are sensationalist … | |
Post #AglLebq8b185kNAsV6 by [email protected] | |
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@[email protected] @[email protected] It's not exactly like it's … | |
Post #AglLebtgNpxtvMpi1g by [email protected] | |
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@puppygirlhornypost @julia yes, exactly my point--a few Intel SoCs definitely u… | |
Post #AglLpWGPfVoZdcfPJA by [email protected] | |
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@whitequark tomato, tomato, yes (well, depending on the precise definition of &… | |
Post #AglLpWKfPhDXqoenwG by [email protected] | |
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@sjolsen sorry, typo, edited! | |
Post #AglMKODlcYxnfg9Jui by [email protected] | |
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@[email protected] @[email protected] well, the problem is that ME still … | |
Post #AglMKOINLQeLtyJ064 by [email protected] | |
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@puppygirlhornypost @julia there's actually a TOCTTOU bug in firmware signa… | |
Post #AglMM0RizDXwVvRsYK by [email protected] | |
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@puppygirlhornypost @julia (basically, it first reads the firmware to check its… | |
Post #AglOUk5zLYHWJmZjHc by [email protected] | |
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@whitequark It's a pretty weak type system but it's there, the thing is… | |
Post #AglP3ZPT4HhfJPIGtE by [email protected] | |
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@whitequark @steve and then there's the VAX arithmetic shift and round a pa… | |
Post #AglRmU18AE6pWjSDTM by [email protected] | |
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@puppygirlhornypost @julia this is different than what Intel is doing though! s… | |
Post #AglRyct10y2MVcRrrk by [email protected] | |
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@whitequark @tomoyo to me, calling x86 assembly typed sounds a lot like calling… | |
Post #AglRycxGl9RKioRGUq by [email protected] | |
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@recursive @tomoyo is that a "I feel like it's typed" or "I … | |
Post #AglS4kvI2ze7AiR3AW by [email protected] | |
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many of you have never implemented a CPU and it shows o:3(that in itself isn… | |
Post #AglSPmGGGbdnP5GhG4 by [email protected] | |
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@kyle so it's a syntax error, right? that's a reasonable interpretation… | |
Post #AglSbER7quCVyNoOlU by [email protected] | |
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@[email protected] :neofox_melt_3: we gave up on trying to do FP… | |
Post #AglSbEVNb5bUBZnnOa by [email protected] | |
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@natty this is why I dedicated a non-trivial fraction of my entire life to buil… | |
Post #AglSmW5iYL0JuhBBa4 by [email protected] | |
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@whitequark At the instruction level, there are a few types for operands, but w… | |
Post #AglSmW9yIWPI7tAaDA by [email protected] | |
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@typeswitch this is a really good point! | |
Post #AglTNhWL1OtA4kMUaW by [email protected] | |
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on the topic of types, the synthesis of the very large amount of replies I got … | |
Post #AglTTxOyt7Xx4Hu5zM by [email protected] | |
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the next time i want to feel awake but coffee isn't cutting it i'll ask… | |
Post #AglTbk7IANO4BILHyS by [email protected] | |
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@whitequark I feel like I have an answer to this but the problem is you specifi… | |
Post #AglTeJT5hWIcOwlRWi by [email protected] | |
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@mcc replace x86 with ARMv8? | |
Post #AglTkm9RyDr769ev5M by [email protected] | |
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@whitequark hm ok this is imo answerable but I am by the side of the road so it… | |
Post #AglUHR4rLOP3IK5LZQ by [email protected] | |
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@whitequark yes, trivial gnu example:_start: add r1,0x1234<source>:2: … | |
Post #AglUHR975Zo1VW4kCW by [email protected] | |
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@raggi isn't that a syntax error rather than a type error?(also I don't… | |
Post #AglUIQ76PfRUawbV2G by [email protected] | |
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@ironiridis it was explicitly and deliberately bait from the very beginning (I … | |
Post #AglV6CfWfscpNMRZ8S by [email protected] | |
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@whitequark it’s valid syntax in other contexts, so the syntax indicates some… | |
Post #AglV6CjQRNkDZSGgDI by [email protected] | |
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@raggi to you, what is a type? | |
Post #AglV8NM1uuFF5zMOzQ by [email protected] | |
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@whitequark I haven't yet implemented a CPU but I HAVE implemented an x86-6… | |
Post #AglVgBV2UyrGAthC1w by [email protected] | |
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if I think of what a typechecker does, it involves maintaining some kind of typ… | |
Post #AglVpbMNigw2zA8WcC by [email protected] | |
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@whitequark does it count if it's only 4 bit? https://github.com/ParzivalWo… | |
Post #AglVpbQdSsL1CM7vFI by [email protected] | |
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@parzivalwolfram sure why not | |
Post #AglVu4V9JZXMWZMwEq by [email protected] | |
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@whitequark at a fundamental level a type defines a set of allowed values, and … | |
Post #AglVu4ZP3kwKjlMKrw by [email protected] | |
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@raggi right! I guess if your context begins and ends at the boundary of a sing… | |
Post #AglWKSvH8gWBnMAu5w by [email protected] | |
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@whitequark yeah, that's definitely a fair abstraction as we tend to live t… | |
Post #AglWKSzsrYCk1eKaHI by [email protected] | |
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@raggi certainly; it's not any more possible to say exactly what a type is … | |
Post #AglXT9krsFUkuK0ysy by [email protected] | |
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@whitequark type checking is a form of semantic analysis and I’m not aware of… | |
Post #AglXT9oldkc96Pq5xo by [email protected] | |
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@agocke does deciding whether the combination of prefixes, mnemonic, and operan… | |
Post #AglXTpLTF48RtiSI88 by [email protected] | |
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@whitequark I have no idea how hardware is put together, but isn’t it just li… | |
Post #AglXWMe0PNFRkfKoJk by [email protected] | |
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@chrisvest you got the basics down right! | |
Post #AglXqfvERY6TKg4qSe by [email protected] | |
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@whitequark @raggi What is a type? A miserable little pile of values!(Sorry) | |
Post #AglZWzPeT40xtl2xDk by [email protected] | |
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@whitequark It's typed, it's just that there's only one type.(This … | |
Post #AglZWzTuDFPw6x2Lqq by [email protected] | |
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@xgranade this is a take some people have very seriously and i think it's, … | |
Post #Agltb9ONIx2j5fi8fY by [email protected] | |
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@whitequark thinking about it, the closest I’ve ever gotten to hardware is pr… | |
Post #Agm3AGchJLNBEwEJrk by [email protected] | |
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@whitequark Only if it isn't generated by a compiler... | |
Post #Agm5MuZQoUfsW9rKz2 by [email protected] | |
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@[email protected] Possibly a silly question, but does the answer to t… | |
Post #Agm5MudgYg4qjLqjc8 by [email protected] | |
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@squid yeah CHERI is pretty unambiguously dynamically typed | |
Post #AgmJZDyNtrWNWiIQqG by [email protected] | |
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@whitequark no, it’s usually toggled from the front panel. | |
Post #AgmKBgpf3AfW2JYdrk by [email protected] | |
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@whitequark I think the important part is that those values are typically incom… | |
Post #AgmR8G9AVayU5Ezey0 by [email protected] | |
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@c_cube well if you use an instruction that takes registers with a memory opera… | |
Post #AgmqR9POHdg1XbgbLs by [email protected] | |
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@c_cube that's what I'm asking, cube! | |
Post #Ahdle1slNKTXZQcfAW by [email protected] | |
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@whitequark @julia now you got me curious about what the microcode actually _do… | |
Post #Ahdle1x17VsVmcc3nc by [email protected] | |
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@toadjaune the way microcode generally works is that some instructions (not all… | |
Post #AhdlnxMp18wSSkPqu8 by [email protected] | |
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@toadjaune there is often some possibility for branching (jumping and sometimes… | |
Post #AhdlsLXt43PWbpgWum by [email protected] | |
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@toadjaune this is like a bird's eye view. there is a decent amount of reso… | |
Post #Ahe5OTZUer1JtfTDuq by [email protected] | |
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@whitequark oh, ok, so if I get this right, what you mean is that it's not … | |
Post #Ahe5OTdkP2QI6rScXw by [email protected] | |
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@toadjaune yesI think Intel published some papers? | |
Post #AheLGdtRzooOrM5kRc by [email protected] | |
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@[email protected] @[email protected] Intel CPUs have a performa… | |
Post #AheLGdxhk0DN4Y594i by [email protected] | |
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@niconiconi @whitequark oh, I'm surprised that they expose that.One would t… | |
Post #AheLGe2fRYBVJwP6oK by [email protected] | |
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@toadjaune @niconiconi oh, people have reverse-engineered _far more_ than that;… |