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Hardware/software co-design for a parallel three-dimensional brese... |
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by International Journal of Electrical and Computer Engineering (IJECE) |
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Line plotting is the one of the basic operations in the |
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scan conversion. |
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Bresenham s line drawing algorithm is an efficient and |
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high popular |
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algorithm utilized for this purpose. This algorithm |
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starts from one end-point |
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of the line to the other end-point by calculating one |
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point at each step. As a |
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result, the calculation time for all the points depends |
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on the length of the line |
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thereby the number of the total points presented. In this |
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paper, we developed |
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an approach to speed up the Bresenham algorithm by |
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partitioning each line |
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into number of segments, find the points belong to those |
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segments and |
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drawing them simultaneously to formulate the main line. |
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As a result, the |
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higher number of segments generated, the faster the |
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points are calculated. By |
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employing 32 cores in the Field Programmable Gate Array, |
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a line of length |
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992 points is formulated in 0.31 s only. The complete |
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system is |
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implemented using Zybo board that contains the Xilinx |
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Zynq-7000 chip |
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(Z-7010). |
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Date Published: 2022-10-12 08:13:54 |
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Identifier: 10.11591ijece.v9i1.pp148-156 |
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Item Size: 7089054 |
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Media Type: texts |
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# Topics |
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Bresenham’s algorithm |
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FPGA |
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Line segmentation |
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Parallelization |
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System on Chip |
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