///////////////////////////////////////////
 date: Thu 30 Jan 2025 09:19:57 PM PST  //
 subj: NTC chip C.H.I.P work log        //
 auth: bbsing                           //
///////////////////////////////////////////
-------------------------------------------


,---- [ progress :< ]
| chip identified as: NOT ALPHA
|         chip has at HEADER U14 pin 9 VCC-3V3
|         chip has at HEADER U14 pin 10 LRADC
|
| alpha chips have at HEADER U14 pin 9 LRADC
|
| Found an image to test at website below:
|         image.zip
|
| Learned how to put my chip into fastboot mode which allows me
| to flash it from a system via USB, without setting FEL mode.
|
| AT UART when the system fails to boot type:
| >fastboot 0
`----

/*
*  I'm still thinking I can send a boot partition or something like
*  that over UART via Kermit, but I haven't found anyone doing it
*  yet. For some reason I've seen this done ... maybe its for BSD
*  on the BBB.
*
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
*/

Today I didn't get all that far. I took a backup image I had of
a kali linux system from year 2022 and restored it to my small
Geek+ computer where I was doing most of the work for my CHIP
back when I was trying to get it booted up.

As usual its kinda a mess of different things I've tried from
that time, and I just don't remember everything I was doing
except for what stands out in my mind is a image from
joelguittet.
-------------------------------------------------
https://github.com/joelguittet/meta-chip/issues/4
-------------------------------------------------
In their issue there is a conversation about the chip and
differences between different versions, and they try to work out
why the chip is having a specific problem that I'm not having,
but it does seem  somewhat related.

%{-----------------------------------------------------------------+
| myfreescalewebpage writes:                                      |
| --------------------------                                      |
| After analysis and several testing, the problem is due to       |
| "sunxi-spl-with-ecc.bin" file which is generated with the wrong |
| NAND settings for this CHIP version, particularly OOB size is   |
| different.                                                      |
|                                                                 |
| Solution applied: remove generation of the file                 |
| "sunx-spl-with-ecc.bin" in the u-boot recipe, detection of the  |
| NAND characteristics and generation of the right SPL format at  |
| the loading process.                                            |
|                                                                 |
| See also joelguittet/chip-tools#1 (link broken 404 not found)   |
+-----------------------------------------------------------------%}

Lots to learn here:
------------------
1) what the hell are they talking about?
2) how do I build the images?
3) can I boot the image.zip contents without writing to NAND,
       and just use kermit to load it?