switch(a->tag){
default:
abort();
case TMEM:
o = ((a->seg<<4) + (a->off & 0xFFFF)) & 0xFFFFF;
io = a->cpu->mem + (o>>16);
w = io->r(io->aux, o, a->len);
break;
case TREG:
w = a->cpu->reg[a->reg];
break;
case TREG|TH:
w = a->cpu->reg[a->reg] >> 8;
break;
case TCON:
w = a->val;
break;
}
switch(a->len){
default:
abort();
case 1:
w &= 0xFF;
break;
case 2:
w &= 0xFFFF;
break;
case 4:
break;
}
return w;
}
long
ars(Iarg *a)
{
ulong w = ar(a);
switch(a->len){
default:
abort();
case 1:
return (char)w;
case 2:
return (short)w;
case 4:
return (long)w;
}
}
void
aw(Iarg *a, ulong w)
{
ulong *p, o;
Cpu *cpu;
Bus *io;
cpu = a->cpu;
switch(a->tag){
default:
abort();
case TMEM:
o = ((a->seg<<4) + (a->off & 0xFFFF)) & 0xFFFFF;
io = cpu->mem + (o>>16);
io->w(io->aux, o, w, a->len);
break;
case TREG:
p = cpu->reg + a->reg;
switch(a->len){
case 4:
*p = w;
break;
case 2:
*p = (*p & ~0xFFFF) | (w & 0xFFFF);
break;
case 1:
*p = (*p & ~0xFF) | (w & 0xFF);
break;
}
break;
case TREG|TH:
p = cpu->reg + a->reg;
*p = (*p & ~0xFF00) | (w & 0xFF)<<8;
break;
}
}