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Posts by [email protected] |
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Post #Av44QnxkKo5BRDfVbc by [email protected] |
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from apple q&a: context window of 4096 tokens for the on-device model |
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Post #Av4jYb841trg4ZKTAG by [email protected] |
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It's hard to do something more information-free than a Qualcomm product bri… |
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Post #Av7dJJyJWN8AGXyrZ2 by [email protected] |
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NPU access works even within windows sandbox on this X Elite laptop(Along with … |
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Post #Av7dJhtsYVqMTk5ez2 by [email protected] |
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@cas How it's intended to be used with DirectML:D3D12 metacommands only dri… |
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Post #Av7dLyVzklWCaV04pc by [email protected] |
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Terminal in Android 16 no longer uses U-Boot's UEFI implementation but uses… |
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Post #Av7dLyd5KPBowUJjsm by [email protected] |
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Kernel location at /mnt/internal/linux now |
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Post #Av7dLyjovMZrHNT7Ng by [email protected] |
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Can still be modified and the resulting kernel booted, but uefi no longer part … |
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Post #AvJzxCdQkRabz09bTE by [email protected] |
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hmm... |
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Post #AvcCbwdxnxG4YRsM7s by [email protected] |
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Random fun thing:% cryptexctl versionDarwin Cryptex Management Interface Versio… |
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Post #Avfy8Mw2rom2gQAy24 by [email protected] |
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> Support for Maxwell-, Pascal-, and Volta-based GPUs> The release 580 se… |
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Post #Avhff3BzmVHsCBQVfs by [email protected] |
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Is it just me or the way text looks on the OLED Surface Pro is... irritating? |
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Post #AwYhHyKQCIA1jfMoe8 by [email protected] |
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small random thing:M3 and M3 Pro/Max pcores -> A17 ProM3/M3 Pro ecores ->… |
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Post #AxYP32xCeQpbj0VMdE by [email protected] |
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I wonder if it's even worthwhile to do a blog post on the new Tegra BSP tha… |
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Post #AyASwqwaAqkMYvzgQa by [email protected] |
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FEAT_MTE4 notably decouples MTE and TBI.This allows to have a PAC 4 bits bigger… |
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Post #AyASwtuv7UCRmeEtkm by [email protected] |
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On the Android 39-bit VA typical configuration this allows the PAC to go from 1… |
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Post #AyB7cVeZiZcKrOzOi0 by [email protected] |
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@madcoder @shac FEAT_MTE_NO_ADDRESS_TAGSTCR_EL1.MTX0/1 |
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Post #AyFBcBVpmKCSqKqCuW by [email protected] |
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On Snapdragon 8 Elite onwards: > V79 replaces the prior internal HVX floatin… |
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Post #AyFBcCejWiueOE0pQ8 by [email protected] |
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I missed this, probably because this didn't reach a platform I have in my h… |
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Post #AyFBcXrueuvuBBL9NY by [email protected] |
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@penguin42 it's encoded within instructions, and they have a way to save th… |
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Post #AyGOm4QKTxqUJdGp0a by [email protected] |
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AVE's primary coprocessor on Apple A19 is arm64, but it also has RISC-V 32-… |
