This file is the header used by the CP/M emulator when running under
the following machine(s):
System V Rel 3.2 on Intel 80386 processor
Link this file to cpm.h on the above system. Other entries will be added
as they are tested.
To use this program on systems which differ from the above in significant
ways, a header must be created such that the Z80 registers can be accessed
using the following register names:
A, B, C, D, E, H, L, BC, DE, HL, IX, IY, SP, PC, AF and FLAGS
In addition the following flags sould be available:
CARRY, BCD, PARITY, HALF_CARRY, ZERO and SIGN
Also the HL, SP, IX and IY registers should have a H and L version for
accessing half-words and TEMP should be a scratch variable accessed the
same way. See below for examples.
There should also be a variable IFF and an array of 0x10000 (65,536) bytes
called ram.
The two variables psw_bank and gr_bank should allow register context
switching for the AF register and the general registers
*/
#ifdef COMPILE_TEST
#define CPM_DEBUG
#endif
typedef unsigned char byte;
typedef unsigned short word;
/* We use unsigned short to guarantee two byte words and roll-over */
#define lonyb(v) (v & 0xf)
#define hinyb(v) ((v >> 4) & 0xf)
#define when break; case
typedef union {
word af;
struct {
byte flags, a;
} b;
struct {
unsigned int carry:1;
unsigned int bcd:1;
unsigned int parity:1;
unsigned int x1:1;
unsigned int half:1;
unsigned int x2:1;
unsigned int zero:1;
unsigned int sign:1;
} bits;
} ACC;
typedef union {
struct {
word bc;
word de;
word hl;
} w;
struct {
byte c, b;
byte e, d;
byte l, h;
} b;
} GR;
typedef union {
unsigned char half[2];
unsigned short whole;
} REG;
#else
extern ACC acc[];
extern GR gr[];
extern word PC;
extern byte R, IV, ram[];
extern int gr_bank, acc_bank, IFF;
extern REG reg, sp, ix, iy;
#endif
#define AF (acc[acc_bank].af)
#define A (acc[acc_bank].b.a)
#define FLAGS (acc[acc_bank].b.flags)
#define CARRY (acc[acc_bank].bits.carry)
#define BCD (acc[acc_bank].bits.bcd)
#define PARITY (acc[acc_bank].bits.parity)
#define OVERFLOW (acc[acc_bank].bits.parity)
#define HALF_CARRY (acc[acc_bank].bits.half)
#define ZERO (acc[acc_bank].bits.zero)
#define SIGN (acc[acc_bank].bits.sign)
#define B (gr[gr_bank].b.b)
#define C (gr[gr_bank].b.c)
#define D (gr[gr_bank].b.d)
#define E (gr[gr_bank].b.e)
#define H (gr[gr_bank].b.h)
#define L (gr[gr_bank].b.l)
#define BC (gr[gr_bank].w.bc)
#define DE (gr[gr_bank].w.de)
#define HL (gr[gr_bank].w.hl)
