/*-
* Copyright (c) 2017 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Christos Zoulas.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__RCSID("$NetBSD: h_segv.c,v 1.15 2024/05/14 15:54:16 riastradh Exp $");
static void
trigger_segv(void)
{
volatile int *p = (int *)(intptr_t)atoi("0");
*p = 1;
}
static void
trigger_trap(void)
{
#ifdef PTRACE_BREAKPOINT_ASM
PTRACE_BREAKPOINT_ASM;
#else
/* port me */
#endif
}
static void
trigger_ill(void)
{
#ifdef PTRACE_ILLEGAL_ASM
PTRACE_ILLEGAL_ASM;
#else
/* port me */
#endif
}
static void
check_fpe(void)
{
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not trap on IEEE 754 FP exceptions.
* Skip these tests if running on them and compiled for
* hard float.
*/
if (0 == fpsetmask(fpsetmask(FP_X_INV))) {
printf("FPU does not implement traps on FP exceptions\n");
exit(EXIT_FAILURE);
}
#elif defined __riscv__
printf("RISC-V does not support floating-point exception traps\n");
exit(EXIT_FAILURE);
#endif
exit(EXIT_SUCCESS);
}
volatile int ignore_result;
static void
trigger_fpe(void)
{
volatile double a = getpid();
volatile double b = strtol("0", NULL, 0);
/*
* Try to trigger SIGFPE either by dividing by zero (which is
* defined to raise FE_DIVBYZERO, but may just return infinity
* without trapping the exception) or by converting infinity to
* integer.
*/
ignore_result = (int)(a/b);
}
/* Open an empty file for writing. */
fp = tmpfile();
if (fp == NULL)
err(EXIT_FAILURE, "tmpfile");
/*
* Map an empty file with mmap(2) to a pointer.
*
* PROT_READ handles read-modify-write sequences emitted for
* certain combinations of CPUs and compilers (e.g. Alpha AXP).
*/
p = mmap(0, 1, PROT_READ|PROT_WRITE, MAP_PRIVATE, fileno(fp), 0);
if (p == MAP_FAILED)
err(EXIT_FAILURE, "mmap");
/* Invalid memory access causes CPU trap, translated to SIGBUS */
*p = 'a';
}
static void
trigger(void)
{
switch (sig) {
case SIGSEGV:
trigger_segv();
break;
case SIGTRAP:
trigger_trap();
break;
case SIGILL:
trigger_ill();
break;
case SIGFPE:
trigger_fpe();
break;
case SIGBUS:
trigger_bus();
break;
default:
break;
}
}
static void
foo(int s)
{
char buf[64];
int i = snprintf(buf, sizeof(buf), "got %d\n", s);
write(2, buf, i);