/*-
* Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* color display (p9100) driver.
*
* Does not handle interrupts, even though they can occur.
*
* XXX should defer colormap updates to vertical retrace interrupts
*/
/*
* Match a p9100.
*/
static int
p9100_sbus_match(device_t parent, cfdata_t cf, void *aux)
{
struct sbus_attach_args *sa = aux;
if (strcmp("p9100", sa->sa_name) == 0)
return 100;
return 0;
}
/*
* Attach a display. We need to notice if it is the console, too.
*/
static void
p9100_sbus_attach(device_t parent, device_t self, void *args)
{
struct p9100_softc *sc = device_private(self);
struct sbus_attach_args *sa = args;
struct fbdevice *fb = &sc->sc_fb;
int isconsole;
int node = sa->sa_node;
int i, j;
uint8_t ver, cmap[768];
struct wsemuldisplaydev_attach_args aa;
struct rasops_info *ri;
unsigned long defattr;
if (sbus_bus_map(sc->sc_bustag,
sa->sa_reg[0].oa_space,
sa->sa_reg[0].oa_base,
/*
* XXX for some reason the SBus resources don't cover
* all registers, so we just map what we need
*/
0x8000,
0, &sc->sc_ctl_memh) != 0) {
printf("%s: cannot map control registers\n",
device_xname(self));
return;
}
/*
* we need to map the framebuffer even though we never write to it,
* thanks to some weirdness in the SPARCbook's SBus glue for the
* P9100 - all register accesses need to be 'latched in' whenever we
* go to another 0x80 aligned 'page' by reading the framebuffer at the
* same offset
* XXX apparently the latter isn't true - my SB3GX works fine without
*/
#ifdef PNOZZ_USE_LATCH
if (fb->fb_pixels == NULL) {
if (sbus_bus_map(sc->sc_bustag,
sa->sa_reg[2].oa_space,
sa->sa_reg[2].oa_base,
sc->sc_fb_psize,
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE,
&sc->sc_fb_memh) != 0) {
printf("%s: cannot map framebuffer\n",
device_xname(self));
return;
}
fb->fb_pixels = (char *)sc->sc_fb_memh;
} else {
sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels;
}
#endif
sc->sc_width = prom_getpropint(node, "width", 800);
sc->sc_height = prom_getpropint(node, "height", 600);
sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3;
/* make sure we are not blanked */
if (isconsole) {
p9100_set_video(sc, 1);
delay(1000);
/* hopefully make my oldish PLL lock */
p9100_set_video(sc, 0);
delay(1000000);
p9100_set_video(sc, 1);
}
/* register with power management */
sc->sc_video = 1;
sc->sc_powerstate = PWR_RESUME;
if (!pmf_device_register(self, p9100_suspend, p9100_resume)) {
panic("%s: could not register with PMF",
device_xname(sc->sc_dev));
}
if (isconsole) {
printf(" (console)\n");
} else
printf("\n");
wsfont_init();
#ifdef PNOZZ_DEBUG
/* make the glyph cache visible */
sc->sc_height -= 100;
#endif
case FBIOGETCMAP:
#define p ((struct fbcmap *)data)
return (bt_getcmap(p, &sc->sc_cmap, 256, 1));
case FBIOPUTCMAP:
/* copy to software map */
error = bt_putcmap(p, &sc->sc_cmap, 256, 1);
if (error)
return (error);
/* now blast them into the chip */
/* XXX should use retrace interrupt */
p9100loadcmap(sc, p->index, p->count);
#undef p
break;
case FBIOGVIDEO:
*(int *)data = p9100_get_video(sc);
break;
case FBIOSVIDEO:
p9100_set_video(sc, *(int *)data);
break;
/* these are for both FBIOSCURSOR and FBIOGCURSOR */
#define p ((struct fbcursor *)data)
#define pc (&sc->sc_cursor)
case FBIOSCURSOR:
{
int count;
uint32_t image[0x80], mask[0x80];
uint8_t red[3], green[3], blue[3];
v = p->set;
if (v & FB_CUR_SETCMAP) {
error = copyin(p->cmap.red, red, 3);
error |= copyin(p->cmap.green, green, 3);
error |= copyin(p->cmap.blue, blue, 3);
if (error)
return error;
}
if (v & FB_CUR_SETSHAPE) {
if (p->size.x > 64 || p->size.y > 64)
return EINVAL;
memset(&mask, 0, 0x200);
memset(&image, 0, 0x200);
count = p->size.y * 8;
error = copyin(p->image, image, count);
if (error)
return error;
error = copyin(p->mask, mask, count);
if (error)
return error;
}
/* parameters are OK; do it */
if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) {
if (v & FB_CUR_SETCUR)
pc->pc_enable = p->enable;
if (v & FB_CUR_SETPOS)
pc->pc_pos = p->pos;
if (v & FB_CUR_SETHOT)
pc->pc_hot = p->hot;
p9100_set_fbcursor(sc);
}
if (v & FB_CUR_SETCMAP) {
memcpy(pc->red, red, 3);
memcpy(pc->green, green, 3);
memcpy(pc->blue, blue, 3);
p9100_setcursorcmap(sc);
}
if (v & FB_CUR_SETSHAPE) {
memcpy(pc->pc_bits, image, 0x200);
memcpy(&pc->pc_bits[0x80], mask, 0x200);
p9100_loadcursor(sc);
}
}
break;
#undef p
#undef cc
case FBIOGCURPOS:
*(struct fbcurpos *)data = sc->sc_cursor.pc_pos;
break;
case FBIOSCURPOS:
sc->sc_cursor.pc_pos = *(struct fbcurpos *)data;
p9100_set_fbcursor(sc);
break;
case FBIOGCURMAX:
/* max cursor size is 64x64 */
((struct fbcurpos *)data)->x = 64;
((struct fbcurpos *)data)->y = 64;
break;
switch(sc->sc_depth)
{
case 1: /* 8 bit */
out = (col << 8) | col;
out |= out << 16;
break;
case 2: /* 16 bit */
out = col | (col << 16);
break;
default:
out = col;
}
p9100_ctl_write_4(sc, reg, out);
}
/* screen-to-screen blit */
static void
p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi,
int he, int rop)
{
struct p9100_softc *sc = cookie;
uint32_t src, dst, srcw, dstw;
p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff);
p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC);
p9100_ctl_write_4(sc, ABS_X0, x);
p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL));
p9100_ctl_write_4(sc, ABS_X2, (x + wi));
p9100_ctl_write_4(sc, ABS_Y3, he);
/* now feed the data into the chip */
sc->sc_mono_width = wi;
}
/* write monochrome data to the screen through the blitter */
static void
p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data)
{
int i;
uint32_t latch = 0, bork;
int shift = 24;
int to_go = sc->sc_mono_width;
PNOZZ_LATCH(sc, PIXEL_1);
for (i = 0; i < count; i++) {
bork = data[i];
latch |= (bork << shift);
if (shift == 0) {
/* check how many bits are significant */
if (to_go > 31) {
bus_space_write_4(sc->sc_bustag,
sc->sc_ctl_memh,
(PIXEL_1 + (31 << 2)), latch);
to_go -= 32;
} else
{
bus_space_write_4(sc->sc_bustag,
sc->sc_ctl_memh,
(PIXEL_1 + ((to_go - 1) << 2)), latch);
to_go = 0;
}
latch = 0;
shift = 24;
} else
shift -= 8;
}
if (shift != 24)
p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch);
}
/*
* Undo the effect of an FBIOSVIDEO that turns the video off.
*/
static void
p9100unblank(device_t dev)
{
struct p9100_softc *sc = device_private(dev);
p9100_set_video(sc, 1);
/*
* Check if we're in terminal mode. If not force the console screen
* to front so we can see ddb, panic messages and so on
*/
if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) {
sc->sc_mode = WSDISPLAYIO_MODE_EMUL;
if (sc->vd.active != &p9100_console_screen) {
SCREEN_INVISIBLE(sc->vd.active);
sc->vd.active = &p9100_console_screen;
SCREEN_VISIBLE(&p9100_console_screen);
}
p9100_init_engine(sc);
p9100_set_depth(sc, 8);
vcons_redraw_screen(&p9100_console_screen);
}
}
static void
p9100_set_video(struct p9100_softc *sc, int enable)
{
uint32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1);
if (enable)
v |= VIDEO_ENABLED;
else
v &= ~VIDEO_ENABLED;
p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v);
#if NTCTRL > 0
/* Turn On/Off the TFT if we know how.
*/
tadpole_set_video(enable);
#endif
}
/*
* Load a subset of the current (new) colormap into the IBM RAMDAC.
*/
static void
p9100loadcmap(struct p9100_softc *sc, int start, int ncolors)
{
int i;
sc->sc_last_offset = 0xffffffff;
/*
* Return the address that would map the given device at the given
* offset, allowing for the given protection, or return -1 for error.
*/
static paddr_t
p9100mmap(dev_t dev, off_t off, int prot)
{
struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev));
if (off & PGOFSET)
panic("p9100mmap");
if (off < 0)
return (-1);
#ifdef PNOZZ_EMUL_CG3
#define CG3_MMAP_OFFSET 0x04000000
/* Make Xsun think we are a CG3 (SUN3COLOR)
*/
if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) {
off -= CG3_MMAP_OFFSET;
return (bus_space_mmap(sc->sc_bustag,
sc->sc_fb_paddr,
off,
prot,
BUS_SPACE_MAP_LINEAR));
}
#endif
if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/)
return (-1);
off -= sc->sc_fb_psize;
if (off < sc->sc_ctl_psize) {
return (bus_space_mmap(sc->sc_bustag,
sc->sc_ctl_paddr,
off,
prot,
BUS_SPACE_MAP_LINEAR));
}
return EINVAL;
}
/* wscons stuff */
static void
p9100_cursor(void *cookie, int on, int row, int col)
{
struct rasops_info *ri = cookie;
struct vcons_screen *scr = ri->ri_hw;
struct p9100_softc *sc = scr->scr_cookie;
int x, y, wi,he;
wi = ri->ri_font->fontwidth;
he = ri->ri_font->fontheight;
if (ri->ri_flg & RI_CURSOR) {
x = ri->ri_ccol * wi + ri->ri_xorigin;
y = ri->ri_crow * he + ri->ri_yorigin;
p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff);
ri->ri_flg &= ~RI_CURSOR;
}
ri->ri_crow = row;
ri->ri_ccol = col;
if (on)
{
x = ri->ri_ccol * wi + ri->ri_xorigin;
y = ri->ri_crow * he + ri->ri_yorigin;
p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff);
ri->ri_flg |= RI_CURSOR;
}
}
#if 0
static int
p9100_mapchar(void *cookie, int uni, u_int *index)
{
return 0;
}
#endif
/*
* now let's put these values into the System Config Register. No need to
* read it here since we (hopefully) just saved the content
*/
scr = p9100_ctl_read_4(sc, SYS_CONF);
scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) |
(s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT);
DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3);
mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG);
DPRINTF("old memctl: %08x\n", mem);
/* set shift and crtc clock */
mem &= ~(0x0000fc00);
mem |= (memctl << 10) | (memctl << 13);
p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem);
DPRINTF("new memctl: %08x\n", mem);
/* whack the engine... */
p9100_ctl_write_4(sc, SYS_CONF, scr);
/* ok, whack the DAC */
p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11);
p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45);
p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3);
/*
* despite the 3GX manual saying otherwise we don't need to mess with
* any clock dividers here
*/
p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1);
p9100_ramdac_write_ctl(sc, 3, 0);
p9100_ramdac_write_ctl(sc, 4, 0);
