/*      $NetBSD: ohci_pci.c,v 1.61 2025/03/31 14:48:50 riastradh Exp $  */

/*
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Lennart Augustsson ([email protected]) at
* Carlstedt Research & Technology.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
*    notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the
*    documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/

#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ohci_pci.c,v 1.61 2025/03/31 14:48:50 riastradh Exp $");

#include "ehci.h"

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/proc.h>
#include <sys/queue.h>

#include <sys/bus.h>

#include <dev/pci/pcivar.h>
#include <dev/pci/pcidevs.h>
#include <dev/pci/usb_pci.h>

#include <dev/usb/usb.h>
#include <dev/usb/usbdi.h>
#include <dev/usb/usbdivar.h>
#include <dev/usb/usb_mem.h>

#include <dev/usb/ohcireg.h>
#include <dev/usb/ohcivar.h>

struct ohci_pci_softc {
       ohci_softc_t            sc;
#if NEHCI > 0
       struct usb_pci          sc_pci;
#endif
       pci_chipset_tag_t       sc_pc;
       pcitag_t                sc_tag;
       void                    *sc_ih;         /* interrupt vectoring */
};

static int
ohci_pci_match(device_t parent, cfdata_t match, void *aux)
{
       struct pci_attach_args *pa = (struct pci_attach_args *) aux;

       if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
           PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
           PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI)
               return 1;

       return 0;
}

static void
ohci_pci_attach(device_t parent, device_t self, void *aux)
{
       struct ohci_pci_softc *sc = device_private(self);
       struct pci_attach_args *pa = (struct pci_attach_args *)aux;
       pci_chipset_tag_t pc = pa->pa_pc;
       pcitag_t tag = pa->pa_tag;
       char const *intrstr;
       pci_intr_handle_t ih;
       pcireg_t csr;
       char intrbuf[PCI_INTRSTR_LEN];

       sc->sc.sc_dev = self;
       sc->sc.sc_bus.ub_hcpriv = sc;

       if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS &&
           PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_USB) {
               sc->sc.sc_flags = OHCIF_SUPERIO;
       }

       pci_aprint_devinfo(pa, "USB Controller");

       /* check if memory space access is enabled */
       csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
#ifdef DEBUG
       printf("csr: %08x\n", csr);
#endif
       if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) {
               aprint_error_dev(self, "memory access is disabled\n");
               return;
       }

       /* Map I/O registers */
       if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
                          &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
               sc->sc.sc_size = 0;
               aprint_error_dev(self, "can't map mem space\n");
               return;
       }

       /* Disable interrupts, so we don't get any spurious ones. */
       bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
                         OHCI_ALL_INTRS);

       sc->sc_pc = pc;
       sc->sc_tag = tag;
       sc->sc.sc_bus.ub_dmatag = pa->pa_dmat;

       /* Enable the device. */
       pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
                      csr | PCI_COMMAND_MASTER_ENABLE);

       /* Map and establish the interrupt. */
       if (pci_intr_map(pa, &ih)) {
               aprint_error_dev(self, "couldn't map interrupt\n");
               goto fail;
       }

       /*
        * Allocate IRQ
        */
       intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
       sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_USB, ohci_intr, sc,
           device_xname(self));
       if (sc->sc_ih == NULL) {
               aprint_error_dev(self, "couldn't establish interrupt");
               if (intrstr != NULL)
                       aprint_error(" at %s", intrstr);
               aprint_error("\n");
               goto fail;
       }
       aprint_normal_dev(self, "interrupting at %s\n", intrstr);

       int err = ohci_init(&sc->sc);
       if (err) {
               aprint_error_dev(self, "init failed, error=%d\n", err);
               goto fail;
       }

#if NEHCI > 0
       usb_pci_add(&sc->sc_pci, pa, self);
#endif

       if (!pmf_device_register1(self, ohci_suspend, ohci_resume,
                                 ohci_shutdown))
               aprint_error_dev(self, "couldn't establish power handler\n");

       /* Attach usb device. */
       sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint,
           CFARGS_NONE);
       return;

fail:
       if (sc->sc_ih) {
               pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
               sc->sc_ih = NULL;
       }
       if (sc->sc.sc_size) {
               bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
               sc->sc.sc_size = 0;
       }
       return;
}

static int
ohci_pci_detach(device_t self, int flags)
{
       struct ohci_pci_softc *sc = device_private(self);
       int error;

       /*
        * Detach the USB child first.  Disconnects all USB devices and
        * prevents connecting new ones.
        */
       error = config_detach_children(self, flags);
       if (error)
               return error;

       /*
        * Stop listing this as a possible companion controller for
        * ehci(4).
        */
#if NEHCI > 0
       usb_pci_rem(&sc->sc_pci);
#endif

       /*
        * Shut down the controller and block interrupts at the device
        * level.  Once we have shut down the controller, the shutdown
        * handler no longer needed -- deregister it from PMF.
        * (Harmless to call ohci_shutdown more than once, so no
        * synchronization needed.)
        */
       ohci_shutdown(self, 0);
       pmf_device_deregister(self);

       /*
        * Interrupts are blocked at the device level by ohci_shutdown.
        * Disestablish the interrupt handler.  This waits for it to
        * complete on all CPUs.
        */
       if (sc->sc_ih != NULL) {
               pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
               sc->sc_ih = NULL;
       }

       /*
        * Free the bus-independent ohci(4) state now that the
        * interrupt handler has ceased to run on all CPUs.
        */
       ohci_detach(&sc->sc);

       /*
        * Unmap the registers now that we're all done with them.
        */
       if (sc->sc.sc_size) {
               bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
               sc->sc.sc_size = 0;
       }

       return 0;
}

CFATTACH_DECL3_NEW(ohci_pci, sizeof(struct ohci_pci_softc),
   ohci_pci_match, ohci_pci_attach, ohci_pci_detach, ohci_activate, NULL,
   ohci_childdet, 0);

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