/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Andrew Doran.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1999 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from FreeBSD: mlx_pci.c,v 1.4.2.4 2000/10/28 10:48:09 msmith Exp
*/
/*
* Try to give (mc) to the controller. Returns 1 if successful, 0 on
* failure (the controller is not ready to take a command).
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v3_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
{
/* Ready for our command? */
if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_FULL) == 0) {
/* Copy mailbox data to window. */
bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V3REG_MAILBOX, mc->mc_mbox, 13);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V3REG_MAILBOX, 13,
BUS_SPACE_BARRIER_WRITE);
/* Post command. */
mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_FULL);
return (1);
}
return (0);
}
/*
* See if a command has been completed, if so acknowledge its completion and
* recover the slot number and status code.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v3_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
{
/* Status available? */
if ((mlx_inb(mlx, MLX_V3REG_ODB) & MLX_V3_ODB_SAVAIL) != 0) {
*slot = mlx_inb(mlx, MLX_V3REG_STATUS_IDENT);
*status = mlx_inw(mlx, MLX_V3REG_STATUS);
/*
* Enable/disable interrupts as requested. (No acknowledge required)
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static void
mlx_v3_intaction(struct mlx_softc *mlx, int action)
{
mlx_outb(mlx, MLX_V3REG_IE, action != 0);
}
/*
* Poll for firmware error codes during controller initialisation.
*
* Returns 0 if initialisation is complete, 1 if still in progress but no
* error has been fetched, 2 if an error has been retrieved.
*/
static int
mlx_v3_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
{
u_int8_t fwerror;
/* First time around, clear any hardware completion status. */
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_SACK);
DELAY(1000);
mlx->mlx_flags |= MLXF_FW_INITTED;
}
/* Init in progress? */
if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_INIT_BUSY) == 0)
return (0);
/* Test error value. */
fwerror = mlx_inb(mlx, MLX_V3REG_FWERROR);
if ((fwerror & MLX_V3_FWERROR_PEND) == 0)
return (1);
/* Wait up to 2 minutes for the bit to clear. */
for (i = 120; i != 0; i--) {
delay(1000000);
if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_SACK) == 0)
break;
}
if (i == 0) {
/* ZZZ */
printf("mlx0: SACK didn't clear\n");
return (-1);
}
mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_RESET);
/* Wait up to 5 seconds for the bit to clear. */
for (i = 5; i != 0; i--) {
delay(1000000);
if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_RESET) == 0)
break;
}
if (i == 0) {
/* ZZZ */
printf("mlx0: RESET didn't clear\n");
return (-1);
}
/*
* Try to give (mc) to the controller. Returns 1 if successful, 0 on
* failure (the controller is not ready to take a command).
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v4_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
{
/* Ready for our command? */
if ((mlx_inl(mlx, MLX_V4REG_IDB) & MLX_V4_IDB_FULL) == 0) {
/* Copy mailbox data to window. */
bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V4REG_MAILBOX, mc->mc_mbox, 13);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V4REG_MAILBOX, 13,
BUS_SPACE_BARRIER_WRITE);
/* Post command. */
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_HWMBOX_CMD);
return (1);
}
return (0);
}
/*
* See if a command has been completed, if so acknowledge its completion and
* recover the slot number and status code.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v4_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
{
/* Status available? */
if ((mlx_inl(mlx, MLX_V4REG_ODB) & MLX_V4_ODB_HWSAVAIL) != 0) {
*slot = mlx_inb(mlx, MLX_V4REG_STATUS_IDENT);
*status = mlx_inw(mlx, MLX_V4REG_STATUS);
/*
* Enable/disable interrupts as requested.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static void
mlx_v4_intaction(struct mlx_softc *mlx, int action)
{
u_int32_t ier;
/*
* Poll for firmware error codes during controller initialisation.
*
* Returns 0 if initialisation is complete, 1 if still in progress but no
* error has been fetched, 2 if an error has been retrieved.
*/
static int
mlx_v4_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
{
u_int8_t fwerror;
/* First time around, clear any hardware completion status. */
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_SACK);
DELAY(1000);
mlx->mlx_flags |= MLXF_FW_INITTED;
}
/* Init in progress? */
if ((mlx_inl(mlx, MLX_V4REG_IDB) & MLX_V4_IDB_INIT_BUSY) == 0)
return (0);
/* Test error value */
fwerror = mlx_inb(mlx, MLX_V4REG_FWERROR);
if ((fwerror & MLX_V4_FWERROR_PEND) == 0)
return (1);
/*
* Try to give (mc) to the controller. Returns 1 if successful, 0 on failure
* (the controller is not ready to take a command).
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v5_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
{
/* Ready for our command? */
if ((mlx_inb(mlx, MLX_V5REG_IDB) & MLX_V5_IDB_EMPTY) != 0) {
/* Copy mailbox data to window. */
bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V5REG_MAILBOX, mc->mc_mbox, 13);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V5REG_MAILBOX, 13,
BUS_SPACE_BARRIER_WRITE);
/* Post command */
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_HWMBOX_CMD);
return (1);
}
return (0);
}
/*
* See if a command has been completed, if so acknowledge its completion and
* recover the slot number and status code.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v5_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
{
/* Status available? */
if ((mlx_inb(mlx, MLX_V5REG_ODB) & MLX_V5_ODB_HWSAVAIL) != 0) {
*slot = mlx_inb(mlx, MLX_V5REG_STATUS_IDENT);
*status = mlx_inw(mlx, MLX_V5REG_STATUS);
/*
* Enable/disable interrupts as requested.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static void
mlx_v5_intaction(struct mlx_softc *mlx, int action)
{
u_int8_t ier;
/*
* Poll for firmware error codes during controller initialisation.
*
* Returns 0 if initialisation is complete, 1 if still in progress but no
* error has been fetched, 2 if an error has been retrieved.
*/
static int
mlx_v5_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
{
u_int8_t fwerror;
/* First time around, clear any hardware completion status. */
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_SACK);
DELAY(1000);
mlx->mlx_flags |= MLXF_FW_INITTED;
}
/* Init in progress? */
if ((mlx_inb(mlx, MLX_V5REG_IDB) & MLX_V5_IDB_INIT_DONE) != 0)
return (0);
/* Test for error value. */
fwerror = mlx_inb(mlx, MLX_V5REG_FWERROR);
if ((fwerror & MLX_V5_FWERROR_PEND) == 0)
return (1);
#ifdef _MODULE
/*
* XXX Don't allow ioconf.c to redefine the "struct cfdriver ld_cd"
* XXX it will be defined in the common-code module
*/
#undef CFDRIVER_DECL
#define CFDRIVER_DECL(name, class, attr)
#include "ioconf.c"
#endif
static int
mlx_pci_modcmd(modcmd_t cmd, void *opaque)
{
int error = 0;
#ifdef _MODULE
switch (cmd) {
case MODULE_CMD_INIT:
/*
* We skip over the first entry in cfdriver[] array
* since the cfdriver is attached by the common
* (non-attachment-specific) code.
*/
error = config_init_component(&cfdriver_ioconf_mlx_pci[1],
cfattach_ioconf_mlx_pci, cfdata_ioconf_mlx_pci);
break;
case MODULE_CMD_FINI:
error = config_fini_component(&cfdriver_ioconf_mlx_pci[1],
cfattach_ioconf_mlx_pci, cfdata_ioconf_mlx_pci);
break;
default:
error = ENOTTY;
break;
}
#endif
