/* $NetBSD: tulip.c,v 1.213 2024/07/05 04:31:51 rin Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center; and by Charles M. Hannum.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Device driver for the Digital Semiconductor ``Tulip'' (21x4x)
* Ethernet controller family, and a variety of clone chips.
*/
/*
* Set up the media status change function.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_WB89C840F:
sc->sc_statchg = tlp_winb_mii_statchg;
break;
case TULIP_CHIP_DM9102:
case TULIP_CHIP_DM9102A:
sc->sc_statchg = tlp_dm9102_mii_statchg;
break;
default:
/*
* We may override this if we have special media
* handling requirements (e.g. flipping GPIO pins).
*
* The pure-MII statchg function covers the basics.
*/
sc->sc_statchg = tlp_mii_statchg;
break;
}
/*
* Default to no FS|LS in setup packet descriptors. They're
* supposed to be zero according to the 21040 and 21143
* manuals, and some chips fall over badly if they're
* included. Yet, other chips seem to require them. Sigh.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_X3201_3:
sc->sc_setup_fsls = TDCTL_Tx_FS | TDCTL_Tx_LS;
break;
default:
sc->sc_setup_fsls = 0;
}
/*
* Set up various chip-specific quirks.
*
* Note that wherever we can, we use the "ring" option for
* transmit and receive descriptors. This is because some
* clone chips apparently have problems when using chaining,
* although some *only* support chaining.
*
* What we do is always program the "next" pointer, and then
* conditionally set the TDCTL_CH and TDCTL_ER bits in the
* appropriate places.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_21140:
case TULIP_CHIP_21140A:
case TULIP_CHIP_21142:
case TULIP_CHIP_21143:
case TULIP_CHIP_82C115: /* 21143-like */
case TULIP_CHIP_MX98713: /* 21140-like */
case TULIP_CHIP_MX98713A: /* 21143-like */
case TULIP_CHIP_MX98715: /* 21143-like */
case TULIP_CHIP_MX98715A: /* 21143-like */
case TULIP_CHIP_MX98715AEC_X: /* 21143-like */
case TULIP_CHIP_MX98725: /* 21143-like */
case TULIP_CHIP_RS7112: /* 21143-like */
/*
* Run these chips in ring mode.
*/
sc->sc_tdctl_ch = 0;
sc->sc_tdctl_er = TDCTL_ER;
sc->sc_preinit = tlp_2114x_preinit;
break;
case TULIP_CHIP_82C168:
case TULIP_CHIP_82C169:
/*
* Run these chips in ring mode.
*/
sc->sc_tdctl_ch = 0;
sc->sc_tdctl_er = TDCTL_ER;
sc->sc_preinit = tlp_pnic_preinit;
/*
* These chips seem to have busted DMA engines; just put them
* in Store-and-Forward mode from the get-go.
*/
sc->sc_txthresh = TXTH_SF;
break;
case TULIP_CHIP_WB89C840F:
/*
* Run this chip in chained mode.
*/
sc->sc_tdctl_ch = TDCTL_CH;
sc->sc_tdctl_er = 0;
sc->sc_flags |= TULIPF_IC_FS;
break;
case TULIP_CHIP_DM9102:
case TULIP_CHIP_DM9102A:
/*
* Run these chips in chained mode.
*/
sc->sc_tdctl_ch = TDCTL_CH;
sc->sc_tdctl_er = 0;
sc->sc_preinit = tlp_dm9102_preinit;
/*
* These chips have a broken bus interface, so we
* can't use any optimized bus commands. For this
* reason, we tend to underrun pretty quickly, so
* just to Store-and-Forward mode from the get-go.
*/
sc->sc_txthresh = TXTH_DM9102_SF;
break;
case TULIP_CHIP_AX88140:
case TULIP_CHIP_AX88141:
/*
* Run these chips in ring mode.
*/
sc->sc_tdctl_ch = 0;
sc->sc_tdctl_er = TDCTL_ER;
sc->sc_preinit = tlp_asix_preinit;
break;
default:
/*
* Default to running in ring mode.
*/
sc->sc_tdctl_ch = 0;
sc->sc_tdctl_er = TDCTL_ER;
}
/*
* Set up the MII bit-bang operations.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */
sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops;
break;
/*
* Allocate the control data structures, and create and load the
* DMA map for it.
*/
if ((error = bus_dmamem_alloc(sc->sc_dmat,
sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg,
1, &sc->sc_cdnseg, 0)) != 0) {
aprint_error_dev(self,
"unable to allocate control data, error = %d\n", error);
goto fail_0;
}
if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg,
sizeof(struct tulip_control_data), (void **)&sc->sc_control_data,
BUS_DMA_COHERENT)) != 0) {
aprint_error_dev(self,
"unable to map control data, error = %d\n", error);
goto fail_1;
}
if ((error = bus_dmamap_create(sc->sc_dmat,
sizeof(struct tulip_control_data), 1,
sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc->sc_cddmamap = NULL;
aprint_error_dev(self,
"unable to create control data DMA map, error = %d\n",
error);
goto fail_2;
}
if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc->sc_control_data, sizeof(struct tulip_control_data), NULL,
0)) != 0) {
aprint_error_dev(self,
"unable to load control data DMA map, error = %d\n",
error);
goto fail_3;
}
/*
* Create the transmit buffer DMA maps.
*
* Note that on the Xircom clone, transmit buffers must be
* 4-byte aligned. We're almost guaranteed to have to copy
* the packet in that case, so we just limit ourselves to
* one segment.
*
* On the DM9102, the transmit logic can only handle one
* DMA segment.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_X3201_3:
case TULIP_CHIP_DM9102:
case TULIP_CHIP_DM9102A:
case TULIP_CHIP_AX88140:
case TULIP_CHIP_AX88141:
sc->sc_ntxsegs = 1;
break;
default:
sc->sc_ntxsegs = TULIP_NTXSEGS;
}
for (i = 0; i < TULIP_TXQUEUELEN; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc->sc_ntxsegs, MCLBYTES, 0, 0,
&sc->sc_txsoft[i].txs_dmamap)) != 0) {
sc->sc_txsoft[i].txs_dmamap = NULL;
aprint_error_dev(self,
"unable to create tx DMA map %d, error = %d\n", i,
error);
goto fail_4;
}
}
/*
* Create the receive buffer DMA maps.
*/
for (i = 0; i < TULIP_NRXDESC; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
sc->sc_rxsoft[i].rxs_dmamap = NULL;
aprint_error_dev(self,
"unable to create rx DMA map %d, error = %d\n", i,
error);
goto fail_5;
}
sc->sc_rxsoft[i].rxs_mbuf = NULL;
}
/*
* From this point forward, the attachment cannot fail. A failure
* before this point releases all resources that may have been
* allocated.
*/
sc->sc_flags |= TULIPF_ATTACHED;
/*
* Reset the chip to a known state.
*/
tlp_reset(sc);
if (pmf_device_register(self, NULL, NULL))
pmf_class_network_register(self, ifp);
else
aprint_error_dev(self, "couldn't establish power handler\n");
return 0;
/*
* Free any resources we've allocated during the failed attach
* attempt. Do this in reverse order and fall through.
*/
fail_5:
for (i = 0; i < TULIP_NRXDESC; i++) {
if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
bus_dmamap_destroy(sc->sc_dmat,
sc->sc_rxsoft[i].rxs_dmamap);
}
fail_4:
for (i = 0; i < TULIP_TXQUEUELEN; i++) {
if (sc->sc_txsoft[i].txs_dmamap != NULL)
bus_dmamap_destroy(sc->sc_dmat,
sc->sc_txsoft[i].txs_dmamap);
}
bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
fail_3:
bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
fail_2:
bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_control_data,
sizeof(struct tulip_control_data));
fail_1:
bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
fail_0:
return error;
}
/*
* If we want a filter setup, it means no more descriptors were
* available for the setup routine. Let it get a chance to wedge
* itself into the ring.
*/
if (sc->sc_flags & TULIPF_WANT_SETUP)
return;
if ((ifp->if_flags & IFF_RUNNING) != IFF_RUNNING)
return;
/*
* Loop through the send queue, setting up transmit descriptors
* until we drain the queue, or use up all available transmit
* descriptors.
*/
while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
sc->sc_txfree != 0) {
/*
* Grab a packet off the queue.
*/
IFQ_POLL(&ifp->if_snd, m0);
if (m0 == NULL)
break;
m = NULL;
dmamap = txs->txs_dmamap;
/*
* Load the DMA map. If this fails, the packet either
* didn't fit in the allotted number of segments, or we were
* short on resources. In this case, we'll copy and try
* again.
*
* Note that if we're only allowed 1 Tx segment, we
* have an alignment restriction. Do this test before
* attempting to load the DMA map, because it's more
* likely we'll trip the alignment test than the
* more-than-one-segment test.
*/
if ((sc->sc_ntxsegs == 1 && (mtod(m0, uintptr_t) & 3) != 0) ||
bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) {
MGETHDR(m, M_DONTWAIT, MT_DATA);
if (m == NULL) {
aprint_error_dev(sc->sc_dev, "unable to allocate Tx mbuf\n");
break;
}
MCLAIM(m, &sc->sc_ethercom.ec_tx_mowner);
if (m0->m_pkthdr.len > MHLEN) {
MCLGET(m, M_DONTWAIT);
if ((m->m_flags & M_EXT) == 0) {
aprint_error_dev(sc->sc_dev,
"unable to allocate Tx cluster\n");
m_freem(m);
break;
}
}
m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *));
m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
m, BUS_DMA_WRITE | BUS_DMA_NOWAIT);
if (error) {
aprint_error_dev(sc->sc_dev,
"unable to load Tx buffer, error = %d",
error);
break;
}
}
/*
* Ensure we have enough descriptors free to describe
* the packet.
*/
if (dmamap->dm_nsegs > sc->sc_txfree) {
/*
* Not enough free descriptors to transmit this
* packet.
*/
bus_dmamap_unload(sc->sc_dmat, dmamap);
m_freem(m);
break;
}
IFQ_DEQUEUE(&ifp->if_snd, m0);
if (m != NULL) {
m_freem(m0);
m0 = m;
}
/*
* WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET.
*/
/*
* Initialize the transmit descriptors.
*/
for (nexttx = sc->sc_txnext, seg = 0;
seg < dmamap->dm_nsegs;
seg++, nexttx = TULIP_NEXTTX(nexttx)) {
/*
* If this is the first descriptor we're
* enqueueing, don't set the OWN bit just
* yet. That could cause a race condition.
* We'll do it below.
*/
txd = &sc->sc_txdescs[nexttx];
txd->td_status =
(nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN);
txd->td_bufaddr1 =
htole32(dmamap->dm_segs[seg].ds_addr);
txd->td_ctl =
htole32((dmamap->dm_segs[seg].ds_len <<
TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch |
(nexttx == (TULIP_NTXDESC - 1) ?
sc->sc_tdctl_er : 0));
lasttx = nexttx;
}
KASSERT(lasttx != -1);
/* Set `first segment' and `last segment' appropriately. */
sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS);
sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS);
/*
* Store a pointer to the packet so we can free it later,
* and remember what txdirty will be once the packet is
* done.
*/
txs->txs_mbuf = m0;
txs->txs_firstdesc = sc->sc_txnext;
txs->txs_lastdesc = lasttx;
txs->txs_ndescs = dmamap->dm_nsegs;
/*
* Pass the packet to any BPF listeners.
*/
bpf_mtap(ifp, m0, BPF_D_OUT);
}
if (sc->sc_txfree != ofree) {
DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
device_xname(sc->sc_dev), lasttx, firsttx));
/*
* Cause a transmit interrupt to happen on the
* last packet we enqueued.
*/
sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC);
TULIP_CDTXSYNC(sc, lasttx, 1,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
/*
* Some clone chips want IC on the *first* segment in
* the packet. Appease them.
*/
KASSERT(last_txs != NULL);
if ((sc->sc_flags & TULIPF_IC_FS) != 0 &&
last_txs->txs_firstdesc != lasttx) {
sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |=
htole32(TDCTL_Tx_IC);
TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
}
/*
* The entire packet chain is set up. Give the
* first descriptor to the chip now.
*/
sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN);
TULIP_CDTXSYNC(sc, firsttx, 1,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
/* Wake up the transmitter. */
/* XXX USE AUTOPOLLING? */
TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
/* Set a watchdog timer in case the chip flakes out. */
ifp->if_timer = 5;
}
}
if (doing_setup && doing_transmit) {
printf("%s: filter setup and transmit timeout\n",
device_xname(sc->sc_dev));
if_statinc(ifp, if_oerrors);
} else if (doing_transmit) {
printf("%s: transmit timeout\n", device_xname(sc->sc_dev));
if_statinc(ifp, if_oerrors);
} else if (doing_setup)
printf("%s: filter setup timeout\n", device_xname(sc->sc_dev));
else
printf("%s: spurious watchdog timeout\n",
device_xname(sc->sc_dev));
(void) tlp_init(ifp);
/* Try to get more packets going. */
tlp_start(ifp);
}
/* If the interface is up and running, only modify the receive
* filter when setting promiscuous or debug mode. Otherwise fall
* through to ether_ioctl, which will reset the chip.
*/
static int
tlp_ifflags_cb(struct ethercom *ec)
{
struct ifnet *ifp = &ec->ec_if;
struct tulip_softc *sc = ifp->if_softc;
u_short change = ifp->if_flags ^ sc->sc_if_flags;
if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0)
return ENETRESET;
if ((change & IFF_PROMISC) != 0)
(*sc->sc_filter_setup)(sc);
return 0;
}
/*
* tlp_ioctl: [ifnet interface function]
*
* Handle control requests from the operator.
*/
static int
tlp_ioctl(struct ifnet *ifp, u_long cmd, void *data)
{
struct tulip_softc *sc = ifp->if_softc;
int s, error;
s = splnet();
switch (cmd) {
default:
error = ether_ioctl(ifp, cmd, data);
if (error == ENETRESET) {
if (ifp->if_flags & IFF_RUNNING) {
/*
* Multicast list has changed. Set the
* hardware filter accordingly.
*/
(*sc->sc_filter_setup)(sc);
}
error = 0;
}
break;
}
/* Try to get more packets going. */
if (TULIP_IS_ENABLED(sc))
tlp_start(ifp);
#ifdef DEBUG
if (TULIP_IS_ENABLED(sc) == 0)
panic("%s: tlp_intr: not enabled", device_xname(sc->sc_dev));
#endif
/*
* If the interface isn't running, the interrupt couldn't
* possibly have come from us.
*/
if ((ifp->if_flags & IFF_RUNNING) == 0 ||
!device_is_active(sc->sc_dev))
return 0;
/* Disable interrupts on the DM9102 (interrupt edge bug). */
switch (sc->sc_chip) {
case TULIP_CHIP_DM9102:
case TULIP_CHIP_DM9102A:
TULIP_WRITE(sc, CSR_INTEN, 0);
break;
default:
/* Nothing. */
break;
}
for (;;) {
status = TULIP_READ(sc, CSR_STATUS);
if (status) {
TULIP_WRITE(sc, CSR_STATUS, status);
rndstatus = status;
}
if ((status & sc->sc_inten) == 0)
break;
handled = 1;
rxstatus = status & sc->sc_rxint_mask;
txstatus = status & sc->sc_txint_mask;
if (rxstatus) {
/* Grab new any new packets. */
tlp_rxintr(sc);
if (rxstatus & STATUS_RWT)
printf("%s: receive watchdog timeout\n",
device_xname(sc->sc_dev));
if (rxstatus & STATUS_RU) {
printf("%s: receive ring overrun\n",
device_xname(sc->sc_dev));
/* Get the receive process going again. */
if (sc->sc_tdctl_er != TDCTL_ER) {
tlp_idle(sc, OPMODE_SR);
TULIP_WRITE(sc, CSR_RXLIST,
TULIP_CDRXADDR(sc, sc->sc_rxptr));
TULIP_WRITE(sc, CSR_OPMODE,
sc->sc_opmode);
}
TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD);
break;
}
}
if (txstatus) {
/* Sweep up transmit descriptors. */
tlp_txintr(sc);
if (txstatus & STATUS_TJT)
printf("%s: transmit jabber timeout\n",
device_xname(sc->sc_dev));
if (txstatus & STATUS_UNF) {
/*
* Increase our transmit threshold if
* another is available.
*/
txthresh = sc->sc_txthresh + 1;
if (sc->sc_txth[txthresh].txth_name != NULL) {
/* Idle the transmit process. */
tlp_idle(sc, OPMODE_ST);
/*
* Set the new threshold and restart
* the transmit process.
*/
TULIP_WRITE(sc, CSR_OPMODE,
sc->sc_opmode);
}
/*
* XXX Log every Nth underrun from
* XXX now on?
*/
}
}
if (status & (STATUS_TPS | STATUS_RPS)) {
if (status & STATUS_TPS)
printf("%s: transmit process stopped\n",
device_xname(sc->sc_dev));
if (status & STATUS_RPS)
printf("%s: receive process stopped\n",
device_xname(sc->sc_dev));
(void) tlp_init(ifp);
break;
}
if (status & STATUS_SE) {
const char *str;
switch (status & STATUS_EB) {
case STATUS_EB_PARITY:
str = "parity error";
break;
/*
* Not handled:
*
* Transmit buffer unavailable -- normal
* condition, nothing to do, really.
*
* General purpose timer experied -- we don't
* use the general purpose timer.
*
* Early receive interrupt -- not available on
* all chips, we just use RI. We also only
* use single-segment receive DMA, so this
* is mostly useless.
*/
}
/* Bring interrupts back up on the DM9102. */
switch (sc->sc_chip) {
case TULIP_CHIP_DM9102:
case TULIP_CHIP_DM9102A:
TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten);
break;
default:
/* Nothing. */
break;
}
/* Try to get more packets going. */
if_schedule_deferred_start(ifp);
if (handled)
rnd_add_uint32(&sc->sc_rnd_source, rndstatus);
for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) {
rxs = &sc->sc_rxsoft[i];
TULIP_CDRXSYNC(sc, i,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
rxstat = le32toh(sc->sc_rxdescs[i].td_status);
if (rxstat & TDSTAT_OWN) {
/*
* We have processed all of the receive buffers.
*/
break;
}
/*
* Make sure the packet fit in one buffer. This should
* always be the case. But the Lite-On PNIC, rev 33
* has an awful receive engine bug, which may require
* a very icky work-around.
*/
if ((rxstat & (TDSTAT_Rx_FS | TDSTAT_Rx_LS)) !=
(TDSTAT_Rx_FS | TDSTAT_Rx_LS)) {
printf("%s: incoming packet spilled, resetting\n",
device_xname(sc->sc_dev));
(void) tlp_init(ifp);
return;
}
/*
* If any collisions were seen on the wire, count one.
*/
if (rxstat & TDSTAT_Rx_CS)
if_statinc(ifp, if_collisions);
/*
* If an error occurred, update stats, clear the status
* word, and leave the packet buffer in place. It will
* simply be reused the next time the ring comes around.
*/
errors = TDSTAT_Rx_DE | TDSTAT_Rx_RF | TDSTAT_Rx_TL |
TDSTAT_Rx_CS | TDSTAT_Rx_RE | TDSTAT_Rx_DB | TDSTAT_Rx_CE;
/*
* If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long
* error.
*/
if ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) != 0)
errors &= ~TDSTAT_Rx_TL;
/*
* If chip doesn't have MII, ignore the MII error bit.
*/
if ((sc->sc_flags & TULIPF_HAS_MII) == 0)
errors &= ~TDSTAT_Rx_RE;
/*
* No errors; receive the packet. Note the Tulip
* includes the CRC with every packet.
*/
len = TDSTAT_Rx_LENGTH(rxstat) - ETHER_CRC_LEN;
#ifdef __NO_STRICT_ALIGNMENT
/*
* Allocate a new mbuf cluster. If that fails, we are
* out of memory, and must drop the packet and recycle
* the buffer that's already attached to this descriptor.
*/
m = rxs->rxs_mbuf;
if (tlp_add_rxbuf(sc, i) != 0) {
if_statinc(ifp, if_ierrors);
TULIP_INIT_RXDESC(sc, i);
bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
continue;
}
#else
/*
* The Tulip's receive buffers must be 4-byte aligned.
* But this means that the data after the Ethernet header
* is misaligned. We must allocate a new buffer and
* copy the data, shifted forward 2 bytes.
*/
MGETHDR(m, M_DONTWAIT, MT_DATA);
if (m == NULL) {
dropit:
if_statinc(ifp, if_ierrors);
TULIP_INIT_RXDESC(sc, i);
bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
continue;
}
MCLAIM(m, &sc->sc_ethercom.ec_rx_mowner);
if (len > (MHLEN - 2)) {
MCLGET(m, M_DONTWAIT);
if ((m->m_flags & M_EXT) == 0) {
m_freem(m);
goto dropit;
}
}
m->m_data += 2;
/*
* Note that we use clusters for incoming frames, so the
* buffer is virtually contiguous.
*/
memcpy(mtod(m, void *), mtod(rxs->rxs_mbuf, void *), len);
/* Allow the receive descriptor to continue using its mbuf. */
TULIP_INIT_RXDESC(sc, i);
bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
#endif /* __NO_STRICT_ALIGNMENT */
/*
* XXX Work-around for a weird problem with the emulated
* 21041 on Connectix Virtual PC:
*
* When we receive a full-size TCP segment, we seem to get
* a packet there the Rx status says 1522 bytes, yet we do
* not get a frame-too-long error from the chip. The extra
* bytes seem to always be zeros. Perhaps Virtual PC is
* inserting 4 bytes of zeros after every packet. In any
* case, let's try and detect this condition and truncate
* the length so that it will pass up the stack.
*/
if (__predict_false((sc->sc_flags & TULIPF_VPC) != 0)) {
uint16_t etype = ntohs(eh->ether_type);
if (len > ETHER_MAX_FRAME(ifp, etype, 0))
m->m_pkthdr.len = m->m_len = len =
ETHER_MAX_FRAME(ifp, etype, 0);
}
/*
* We sometimes have to run the 21140 in Hash-Only
* mode. If we're in that mode, and not in promiscuous
* mode, and we have a unicast packet that isn't for
* us, then drop it.
*/
if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY &&
(ifp->if_flags & IFF_PROMISC) == 0 &&
ETHER_IS_MULTICAST(eh->ether_dhost) == 0 &&
memcmp(CLLADDR(ifp->if_sadl), eh->ether_dhost,
ETHER_ADDR_LEN) != 0) {
m_freem(m);
continue;
}
/* Pass it on. */
if_percpuq_enqueue(ifp->if_percpuq, m);
}
/* Update the receive pointer. */
sc->sc_rxptr = i;
}
/*
* Go through our Tx list and free mbufs for those
* frames that have been transmitted.
*/
while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
TULIP_CDTXSYNC(sc, txs->txs_lastdesc, txs->txs_ndescs,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
#ifdef TLP_DEBUG
if (ifp->if_flags & IFF_DEBUG) {
int i;
struct tulip_desc *txd;
printf(" txsoft %p transmit chain:\n", txs);
for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) {
txd = &sc->sc_txdescs[i];
printf(" descriptor %d:\n", i);
printf(" td_status: 0x%08x\n",
le32toh(txd->td_status));
printf(" td_ctl: 0x%08x\n",
le32toh(txd->td_ctl));
printf(" td_bufaddr1: 0x%08x\n",
le32toh(txd->td_bufaddr1));
printf(" td_bufaddr2: 0x%08x\n",
le32toh(sc->sc_txdescs[i].td_bufaddr2));
if (i == txs->txs_lastdesc)
break;
}
}
#endif
txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status);
if (txstat & TDSTAT_OWN)
break;
SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q);
sc->sc_txfree += txs->txs_ndescs;
if (txs->txs_mbuf == NULL) {
/*
* If we didn't have an mbuf, it was the setup
* packet.
*/
#ifdef DIAGNOSTIC
if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0)
panic("tlp_txintr: null mbuf, not doing setup");
#endif
TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE);
sc->sc_flags &= ~TULIPF_DOING_SETUP;
SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
continue;
}
/*
* If there are no more pending transmissions, cancel the watchdog
* timer.
*/
if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0)
ifp->if_timer = 0;
/*
* If we have a receive filter setup pending, do it now.
*/
if (sc->sc_flags & TULIPF_WANT_SETUP)
(*sc->sc_filter_setup)(sc);
}
/*
* tlp_reset:
*
* Perform a soft reset on the Tulip.
*/
void
tlp_reset(struct tulip_softc *sc)
{
int i;
TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR);
/*
* Xircom, ASIX and Conexant clones don't bring themselves
* out of reset automatically.
* Instead, we have to wait at least 50 PCI cycles, and then
* clear SWR.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_X3201_3:
case TULIP_CHIP_AX88140:
case TULIP_CHIP_AX88141:
case TULIP_CHIP_RS7112:
delay(10);
TULIP_WRITE(sc, CSR_BUSMODE, 0);
break;
default:
break;
}
for (i = 0; i < 1000; i++) {
/*
* Wait at least 50 PCI cycles for the reset to
* complete before peeking at the Tulip again.
* 10 uSec is a bit longer than 50 PCI cycles
* (at 33MHz), but it doesn't hurt have the extra
* wait.
*/
delay(10);
if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0)
break;
}
if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR))
aprint_error_dev(sc->sc_dev, "reset failed to complete\n");
delay(1000);
/*
* If the board has any GPIO reset sequences to issue, do them now.
*/
if (sc->sc_reset != NULL)
(*sc->sc_reset)(sc);
}
/*
* tlp_init: [ ifnet interface function ]
*
* Initialize the interface. Must be called at splnet().
*/
static int
tlp_init(struct ifnet *ifp)
{
struct tulip_softc *sc = ifp->if_softc;
struct tulip_txsoft *txs;
struct tulip_rxsoft *rxs;
int i, error = 0;
if ((error = tlp_enable(sc)) != 0)
goto out;
/*
* Cancel any pending I/O.
*/
tlp_stop(ifp, 0);
/*
* Initialize `opmode' to 0, and call the pre-init routine, if
* any. This is required because the 2114x and some of the
* clones require that the media-related bits in `opmode' be
* set before performing a soft-reset in order to get internal
* chip pathways are correct. Yay!
*/
sc->sc_opmode = 0;
if (sc->sc_preinit != NULL)
(*sc->sc_preinit)(sc);
/*
* Reset the Tulip to a known state.
*/
tlp_reset(sc);
/*
* Initialize the BUSMODE register.
*/
sc->sc_busmode = BUSMODE_BAR;
switch (sc->sc_chip) {
case TULIP_CHIP_21140:
case TULIP_CHIP_21140A:
case TULIP_CHIP_21142:
case TULIP_CHIP_21143:
case TULIP_CHIP_82C115:
case TULIP_CHIP_MX98725:
/*
* If we're allowed to do so, use Memory Read Line
* and Memory Read Multiple.
*
* XXX Should we use Memory Write and Invalidate?
*/
if (sc->sc_flags & TULIPF_MRL)
sc->sc_busmode |= BUSMODE_RLE;
if (sc->sc_flags & TULIPF_MRM)
sc->sc_busmode |= BUSMODE_RME;
#if 0
if (sc->sc_flags & TULIPF_MWI)
sc->sc_busmode |= BUSMODE_WLE;
#endif
break;
case TULIP_CHIP_82C168:
case TULIP_CHIP_82C169:
sc->sc_busmode |= BUSMODE_PNIC_MBO;
if (sc->sc_maxburst == 0)
sc->sc_maxburst = 16;
break;
case TULIP_CHIP_AX88140:
case TULIP_CHIP_AX88141:
if (sc->sc_maxburst == 0)
sc->sc_maxburst = 16;
break;
default:
/* Nothing. */
break;
}
switch (sc->sc_cacheline) {
default:
/*
* Note: We must *always* set these bits; a cache
* alignment of 0 is RESERVED.
*/
case 8:
sc->sc_busmode |= BUSMODE_CAL_8LW;
break;
case 16:
sc->sc_busmode |= BUSMODE_CAL_16LW;
break;
case 32:
sc->sc_busmode |= BUSMODE_CAL_32LW;
break;
}
switch (sc->sc_maxburst) {
case 1:
sc->sc_busmode |= BUSMODE_PBL_1LW;
break;
case 2:
sc->sc_busmode |= BUSMODE_PBL_2LW;
break;
case 4:
sc->sc_busmode |= BUSMODE_PBL_4LW;
break;
case 8:
sc->sc_busmode |= BUSMODE_PBL_8LW;
break;
case 16:
sc->sc_busmode |= BUSMODE_PBL_16LW;
break;
case 32:
sc->sc_busmode |= BUSMODE_PBL_32LW;
break;
default:
sc->sc_busmode |= BUSMODE_PBL_DEFAULT;
break;
}
#if BYTE_ORDER == BIG_ENDIAN
/*
* Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips
* support them, and even on ones that do, it doesn't
* always work. So we always access descriptors with
* little endian via htole32/le32toh.
*/
#endif
/*
* Big-endian bus requires BUSMODE_BLE anyway.
* Also, BUSMODE_DBO is needed because we assume
* descriptors are little endian.
*/
if (sc->sc_flags & TULIPF_BLE)
sc->sc_busmode |= BUSMODE_BLE;
if (sc->sc_flags & TULIPF_DBO)
sc->sc_busmode |= BUSMODE_DBO;
/*
* Some chips have a broken bus interface.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_DM9102:
case TULIP_CHIP_DM9102A:
sc->sc_busmode = 0;
break;
default:
/* Nothing. */
break;
}
TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode);
/*
* Initialize the OPMODE register. We don't write it until
* we're ready to begin the transmit and receive processes.
*
* Media-related OPMODE bits are set in the media callbacks
* for each specific chip/board.
*/
sc->sc_opmode |= OPMODE_SR | OPMODE_ST |
sc->sc_txth[sc->sc_txthresh].txth_opmode;
/*
* Magical mystery initialization on the Macronix chips.
* The MX98713 uses its own magic value, the rest share
* a common one.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_MX98713:
TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713);
break;
case TULIP_CHIP_MX98713A:
case TULIP_CHIP_MX98715:
case TULIP_CHIP_MX98715A:
case TULIP_CHIP_MX98715AEC_X:
case TULIP_CHIP_MX98725:
TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715);
break;
switch (sc->sc_chip) {
case TULIP_CHIP_WB89C840F:
/*
* Clear bits that we don't want that happen to
* overlap or don't exist.
*/
sc->sc_inten &= ~(STATUS_WINB_REI | STATUS_RWT);
break;
/*
* Give the transmit and receive rings to the Tulip.
*/
TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext));
TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr));
/*
* On chips that do this differently, set the station address.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_WB89C840F:
{
/* XXX Do this with stream writes? */
bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0);
for (i = 0; i < ETHER_ADDR_LEN; i++) {
bus_space_write_1(sc->sc_st, sc->sc_sh,
cpa + i, CLLADDR(ifp->if_sadl)[i]);
}
break;
}
case TULIP_CHIP_AL981:
case TULIP_CHIP_AN983:
case TULIP_CHIP_AN985:
{
uint32_t reg;
const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
/*
* Mark the interface down and cancel the watchdog timer.
*/
ifp->if_flags &= ~IFF_RUNNING;
sc->sc_if_flags = ifp->if_flags;
ifp->if_timer = 0;
/*
* Reset the chip (needed on some flavors to actually disable it).
*/
tlp_reset(sc);
if (disable) {
tlp_rxdrain(sc);
tlp_disable(sc);
}
}
#define SROM_EMIT(sc, x) \
do { \
TULIP_WRITE((sc), CSR_MIIROM, (x)); \
delay(2); \
} while (0)
/*
* tlp_srom_idle:
*
* Put the SROM in idle state.
*/
static void
tlp_srom_idle(struct tulip_softc *sc)
{
uint32_t miirom;
int i;
miirom = MIIROM_SR;
SROM_EMIT(sc, miirom);
miirom |= MIIROM_RD;
SROM_EMIT(sc, miirom);
miirom |= MIIROM_SROMCS;
SROM_EMIT(sc, miirom);
SROM_EMIT(sc, miirom | MIIROM_SROMSK);
/* Strobe the clock 32 times. */
for (i = 0; i < 32; i++) {
SROM_EMIT(sc, miirom);
SROM_EMIT(sc, miirom | MIIROM_SROMSK);
}
SROM_EMIT(sc, miirom);
miirom &= ~MIIROM_SROMCS;
SROM_EMIT(sc, miirom);
SROM_EMIT(sc, 0);
}
/*
* tlp_srom_size:
*
* Determine the number of address bits in the SROM.
*/
static int
tlp_srom_size(struct tulip_softc *sc)
{
uint32_t miirom;
int x;
/* Select the SROM. */
miirom = MIIROM_SR;
SROM_EMIT(sc, miirom);
miirom |= MIIROM_RD;
SROM_EMIT(sc, miirom);
/* Send CHIP SELECT for one clock tick. */
miirom |= MIIROM_SROMCS;
SROM_EMIT(sc, miirom);
/* Shift in the READ opcode. */
for (x = 3; x > 0; x--) {
if (TULIP_SROM_OPC_READ & (1 << (x - 1)))
miirom |= MIIROM_SROMDI;
else
miirom &= ~MIIROM_SROMDI;
SROM_EMIT(sc, miirom);
SROM_EMIT(sc, miirom | MIIROM_SROMSK);
SROM_EMIT(sc, miirom);
}
/* Shift in address and look for dummy 0 bit. */
for (x = 1; x <= 12; x++) {
miirom &= ~MIIROM_SROMDI;
SROM_EMIT(sc, miirom);
SROM_EMIT(sc, miirom | MIIROM_SROMSK);
if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO))
break;
SROM_EMIT(sc, miirom);
}
/*
* tlp_isv_srom:
*
* Check to see if the SROM is in the new standardized format.
*/
int
tlp_isv_srom(const uint8_t *romdata)
{
int i;
uint16_t cksum;
if (tlp_srom_crcok(romdata)) {
/*
* SROM CRC checks out; must be in the new format.
*/
return 1;
}
cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM);
if (cksum == 0xffff || cksum == 0) {
/*
* No checksum present. Check the SROM ID; 18 bytes of 0
* followed by 1 (version) followed by the number of
* adapters which use this SROM (should be non-zero).
*/
for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) {
if (romdata[i] != 0)
return 0;
}
if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1)
return 0;
if (romdata[TULIP_ROM_CHIP_COUNT] == 0)
return 0;
return 1;
}
return 0;
}
/*
* tlp_isv_srom_enaddr:
*
* Get the Ethernet address from an ISV SROM.
*/
int
tlp_isv_srom_enaddr(struct tulip_softc *sc, uint8_t *enaddr)
{
int i, devcnt;
if (tlp_isv_srom(sc->sc_srom) == 0)
return 0;
devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
for (i = 0; i < devcnt; i++) {
if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
break;
if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
sc->sc_devno)
break;
}
/*
* tlp_parse_old_srom:
*
* Parse old-format SROMs.
*
* This routine is largely lifted from Matt Thomas's `de' driver.
*/
int
tlp_parse_old_srom(struct tulip_softc *sc, uint8_t *enaddr)
{
static const uint8_t testpat[] =
{ 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa };
int i;
uint32_t cksum;
if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) {
/*
* Phobos G100 interfaces have the address at
* offsets 0 and 20, but each pair of bytes is
* swapped.
*/
if (sc->sc_srom_addrbits == 6 &&
sc->sc_srom[1] == 0x00 &&
sc->sc_srom[0] == 0x60 &&
sc->sc_srom[3] == 0xf5 &&
memcmp(&sc->sc_srom[0], &sc->sc_srom[20], 6) == 0) {
for (i = 0; i < 6; i += 2) {
enaddr[i] = sc->sc_srom[i + 1];
enaddr[i + 1] = sc->sc_srom[i];
}
return 1;
}
/*
* Phobos G130/G160 interfaces have the address at
* offsets 20 and 84, but each pair of bytes is
* swapped.
*/
if (sc->sc_srom_addrbits == 6 &&
sc->sc_srom[21] == 0x00 &&
sc->sc_srom[20] == 0x60 &&
sc->sc_srom[23] == 0xf5 &&
memcmp(&sc->sc_srom[20], &sc->sc_srom[84], 6) == 0) {
for (i = 0; i < 6; i += 2) {
enaddr[i] = sc->sc_srom[20 + i + 1];
enaddr[i + 1] = sc->sc_srom[20 + i];
}
return 1;
}
/*
* Cobalt Networks interfaces simply have the address
* in the first six bytes. The rest is zeroed out
* on some models, but others contain unknown data.
*/
if (sc->sc_srom[0] == 0x00 &&
sc->sc_srom[1] == 0x10 &&
sc->sc_srom[2] == 0xe0) {
memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
return 1;
}
/*
* Some vendors (e.g. ZNYX) don't use the standard
* DEC Address ROM format, but rather just have an
* Ethernet address in the first 6 bytes, maybe a
* 2 byte checksum, and then all 0xff's.
*/
for (i = 8; i < 32; i++) {
if (sc->sc_srom[i] != 0xff &&
sc->sc_srom[i] != 0)
return 0;
}
/*
* Sanity check the Ethernet address:
*
* - Make sure it's not multicast or locally
* assigned
* - Make sure it has a non-0 OUI
*/
if (sc->sc_srom[0] & 3)
return 0;
if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 &&
sc->sc_srom[2] == 0)
return 0;
/*
* If there are transmissions pending, wait until they have
* completed.
*/
if (! SIMPLEQ_EMPTY(&sc->sc_txdirtyq) ||
(sc->sc_flags & TULIPF_DOING_SETUP) != 0) {
sc->sc_flags |= TULIPF_WANT_SETUP;
DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n",
device_xname(sc->sc_dev)));
return;
}
sc->sc_flags &= ~TULIPF_WANT_SETUP;
switch (sc->sc_chip) {
case TULIP_CHIP_82C115:
hashsize = TULIP_PNICII_HASHSIZE;
break;
default:
hashsize = TULIP_MCHASHSIZE;
}
/*
* If we're running, idle the transmit and receive engines. If
* we're NOT running, we're being called from tlp_init(), and our
* writing OPMODE will start the transmit and receive processes
* in motion.
*/
if (ifp->if_flags & IFF_RUNNING)
tlp_idle(sc, OPMODE_ST | OPMODE_SR);
sc->sc_filtmode = TDCTL_Tx_FT_PERFECT;
sp = TULIP_CDSP(sc);
memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
cnt = 0;
ETHER_LOCK(ec);
ETHER_FIRST_MULTI(step, ec, enm);
while (enm != NULL) {
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
/*
* We must listen to a range of multicast addresses.
* For now, just accept all multicasts, rather than
* trying to set only those filter bits needed to match
* the range. (At this time, the only use of address
* ranges is for IP multicast routing, for which the
* range is big enough to require all bits set.)
*/
ETHER_UNLOCK(ec);
goto allmulti;
}
if (cnt == (TULIP_MAXADDRS - 2)) {
/*
* We already have our multicast limit (still need
* our station address and broadcast). Go to
* Hash-Perfect mode.
*/
ETHER_UNLOCK(ec);
goto hashperfect;
}
cnt++;
*sp++ = htole32(TULIP_SP_FIELD(enm->enm_addrlo, 0));
*sp++ = htole32(TULIP_SP_FIELD(enm->enm_addrlo, 1));
*sp++ = htole32(TULIP_SP_FIELD(enm->enm_addrlo, 2));
ETHER_NEXT_MULTI(step, enm);
}
ETHER_UNLOCK(ec);
/* Pad the rest with our station address. */
for (; cnt < TULIP_MAXADDRS; cnt++) {
*sp++ = htole32(TULIP_SP_FIELD(enaddr, 0));
*sp++ = htole32(TULIP_SP_FIELD(enaddr, 1));
*sp++ = htole32(TULIP_SP_FIELD(enaddr, 2));
}
ifp->if_flags &= ~IFF_ALLMULTI;
goto setit;
hashperfect:
/*
* Try Hash-Perfect mode.
*/
/*
* Some 21140 chips have broken Hash-Perfect modes. On these
* chips, we simply use Hash-Only mode, and put our station
* address into the filter.
*/
if (sc->sc_chip == TULIP_CHIP_21140)
sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY;
else
sc->sc_filtmode = TDCTL_Tx_FT_HASH;
sp = TULIP_CDSP(sc);
memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN);
ETHER_LOCK(ec);
ETHER_FIRST_MULTI(step, ec, enm);
while (enm != NULL) {
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
/*
* We must listen to a range of multicast addresses.
* For now, just accept all multicasts, rather than
* trying to set only those filter bits needed to match
* the range. (At this time, the only use of address
* ranges is for IP multicast routing, for which the
* range is big enough to require all bits set.)
*/
ETHER_UNLOCK(ec);
goto allmulti;
}
hash = tlp_mchash(enm->enm_addrlo, hashsize);
sp[hash >> 4] |= htole32(1 << (hash & 0xf));
ETHER_NEXT_MULTI(step, enm);
}
ETHER_UNLOCK(ec);
/*
* Set the OPMODE register. This will also resume the
* transmit process we idled above.
*/
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
sc->sc_flags |= TULIPF_DOING_SETUP;
/*
* Kick the transmitter; this will cause the Tulip to
* read the setup descriptor.
*/
/* XXX USE AUTOPOLLING? */
TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD);
/* Set up a watchdog timer in case the chip flakes out. */
ifp->if_timer = 5;
ETHER_FIRST_MULTI(step, ec, enm);
while (enm != NULL) {
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
/*
* We must listen to a range of multicast addresses.
* For now, just accept all multicasts, rather than
* trying to set only those filter bits needed to match
* the range. (At this time, the only use of address
* ranges is for IP multicast routing, for which the
* range is big enough to require all bits set.)
*/
goto allmulti;
}
/*
* According to the FreeBSD `wb' driver, yes, you
* really do invert the hash.
*/
hash =
(~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26))
& 0x3f;
mchash[hash >> 5] |= 1 << (hash & 0x1f);
ETHER_NEXT_MULTI(step, enm);
}
ifp->if_flags &= ~IFF_ALLMULTI;
goto setit;
/*
* If the chip is running, we need to reset the interface,
* and will revisit here (with IFF_RUNNING) clear. The
* chip seems to really not like to have its multicast
* filter programmed without a reset.
*/
if (ifp->if_flags & IFF_RUNNING) {
(void) tlp_init(ifp);
return;
}
ETHER_LOCK(ec);
ETHER_FIRST_MULTI(step, ec, enm);
while (enm != NULL) {
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
/*
* We must listen to a range of multicast addresses.
* For now, just accept all multicasts, rather than
* trying to set only those filter bits needed to match
* the range. (At this time, the only use of address
* ranges is for IP multicast routing, for which the
* range is big enough to require all bits set.)
*/
ETHER_UNLOCK(ec);
goto allmulti;
}
ETHER_LOCK(ec);
ETHER_FIRST_MULTI(step, ec, enm);
while (enm != NULL) {
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
/*
* We must listen to a range of multicast addresses.
* For now, just accept all multicasts, rather than
* trying to set only those filter bits needed to match
* the range. (At this time, the only use of address
* ranges is for IP multicast routing, for which the
* range is big enough to require all bits set.)
*/
ETHER_UNLOCK(ec);
goto allmulti;
}
hash = (ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)
& 0x3f;
if (hash < 32)
mchash[0] |= (1 << hash);
else
mchash[1] |= (1 << (hash - 32));
ETHER_NEXT_MULTI(step, enm);
}
ETHER_UNLOCK(ec);
ifp->if_flags &= ~IFF_ALLMULTI;
goto setit;
for (i = 0; i < 1000; i++) {
if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask)
break;
delay(10);
}
csr = TULIP_READ(sc, CSR_STATUS);
if ((csr & ackmask) != ackmask) {
if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
(csr & STATUS_TS) != STATUS_TS_STOPPED) {
switch (sc->sc_chip) {
case TULIP_CHIP_AX88140:
case TULIP_CHIP_AX88141:
/*
* Filter the message out on noisy chips.
*/
break;
default:
printf("%s: transmit process failed to idle: "
"state %s\n", device_xname(sc->sc_dev),
tx_state_names[(csr & STATUS_TS) >> 20]);
}
}
if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
(csr & STATUS_RS) != STATUS_RS_STOPPED) {
switch (sc->sc_chip) {
case TULIP_CHIP_AN983:
case TULIP_CHIP_AN985:
case TULIP_CHIP_DM9102A:
case TULIP_CHIP_RS7112:
/*
* Filter the message out on noisy chips.
*/
break;
default:
printf("%s: receive process failed to idle: "
"state %s\n", device_xname(sc->sc_dev),
rx_state_names[(csr & STATUS_RS) >> 17]);
}
}
}
TULIP_WRITE(sc, CSR_STATUS, ackmask);
}
/*****************************************************************************
* Generic media support functions.
*****************************************************************************/
/*
* tlp_ifmedia_fini:
*
* Wrapper around ifmedia_fini(), which frees any media-speific
* data we may have associated with each entry.
*/
static void
tlp_ifmedia_fini(struct tulip_softc *sc)
{
struct ifmedia_entry *ife;
struct tulip_21x4x_media *tm;
/*****************************************************************************
* Support functions for MII-attached media.
*****************************************************************************/
/*
* tlp_mii_tick:
*
* One second timer, used to tick the MII.
*/
static void
tlp_mii_tick(void *arg)
{
struct tulip_softc *sc = arg;
int s;
if (sc->sc_mii.mii_media_active & IFM_FDX)
sc->sc_opmode |= OPMODE_FD | OPMODE_HBD;
/*
* Write new OPMODE bits. This also restarts the transmit
* and receive processes.
*/
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
}
/*
* tlp_winb_mii_statchg: [mii interface function]
*
* Callback from PHY when media changes. This version is
* for the Winbond 89C840F, which has different OPMODE bits.
*/
static void
tlp_winb_mii_statchg(struct ifnet *ifp)
{
struct tulip_softc *sc = ifp->if_softc;
/* Idle the transmit and receive processes. */
tlp_idle(sc, OPMODE_ST | OPMODE_SR);
sc->sc_opmode &= ~(OPMODE_WINB_FES | OPMODE_FD);
if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX)
sc->sc_opmode |= OPMODE_WINB_FES;
if (sc->sc_mii.mii_media_active & IFM_FDX)
sc->sc_opmode |= OPMODE_FD;
/*
* Write new OPMODE bits. This also restarts the transmit
* and receive processes.
*/
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
}
/*
* tlp_dm9102_mii_statchg: [mii interface function]
*
* Callback from PHY when media changes. This version is
* for the DM9102.
*/
static void
tlp_dm9102_mii_statchg(struct ifnet *ifp)
{
struct tulip_softc *sc = ifp->if_softc;
/*
* Don't idle the transmit and receive processes, here. It
* seems to fail, and just causes excess noise.
*/
sc->sc_opmode &= ~(OPMODE_TTM | OPMODE_FD);
if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX)
sc->sc_opmode |= OPMODE_TTM;
if (sc->sc_mii.mii_media_active & IFM_FDX)
sc->sc_opmode |= OPMODE_FD;
/*
* tlp_mii_setmedia:
*
* Callback from ifmedia to request new media setting.
*/
static int
tlp_mii_setmedia(struct tulip_softc *sc)
{
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
int rc;
if ((ifp->if_flags & IFF_UP) == 0)
return 0;
switch (sc->sc_chip) {
case TULIP_CHIP_21142:
case TULIP_CHIP_21143:
/* Disable the internal Nway engine. */
TULIP_WRITE(sc, CSR_SIATXRX, 0);
break;
/*
* tlp_bitbang_mii_readreg:
*
* Read a PHY register via bit-bang'ing the MII.
*/
static int
tlp_bitbang_mii_readreg(device_t self, int phy, int reg, uint16_t *val)
{
struct tulip_softc *sc = device_private(self);
/*
* tlp_bitbang_mii_writereg:
*
* Write a PHY register via bit-bang'ing the MII.
*/
static int
tlp_bitbang_mii_writereg(device_t self, int phy, int reg, uint16_t val)
{
struct tulip_softc *sc = device_private(self);
/*
* tlp_sio_mii_bitbang_read:
*
* Read the MII serial port for the MII bit-bang module.
*/
static uint32_t
tlp_sio_mii_bitbang_read(device_t self)
{
struct tulip_softc *sc = device_private(self);
return TULIP_READ(sc, CSR_MIIROM);
}
/*
* tlp_sio_mii_bitbang_write:
*
* Write the MII serial port for the MII bit-bang module.
*/
static void
tlp_sio_mii_bitbang_write(device_t self, uint32_t val)
{
struct tulip_softc *sc = device_private(self);
TULIP_WRITE(sc, CSR_MIIROM, val);
}
/*
* tlp_pnic_mii_readreg:
*
* Read a PHY register on the Lite-On PNIC.
*/
static int
tlp_pnic_mii_readreg(device_t self, int phy, int reg, uint16_t *val)
{
struct tulip_softc *sc = device_private(self);
uint32_t data;
int i;
for (i = 0; i < 1000; i++) {
delay(10);
data = TULIP_READ(sc, CSR_PNIC_MII);
if ((data & PNIC_MII_BUSY) == 0) {
if ((data & PNIC_MII_DATA) == PNIC_MII_DATA)
return -1;
else {
*val = data & PNIC_MII_DATA;
return 0;
}
}
}
printf("%s: MII read timed out\n", device_xname(sc->sc_dev));
return ETIMEDOUT;
}
/*
* tlp_pnic_mii_writereg:
*
* Write a PHY register on the Lite-On PNIC.
*/
static int
tlp_pnic_mii_writereg(device_t self, int phy, int reg, uint16_t val)
{
struct tulip_softc *sc = device_private(self);
int i;
/*
* tlp_al981_mii_readreg:
*
* Read a PHY register on the ADMtek AL981.
*/
static int
tlp_al981_mii_readreg(device_t self, int phy, int reg, uint16_t *val)
{
struct tulip_softc *sc = device_private(self);
/* AL981 only has an internal PHY. */
if (phy != 0)
return -1;
/*
* tlp_al981_mii_writereg:
*
* Write a PHY register on the ADMtek AL981.
*/
static int
tlp_al981_mii_writereg(device_t self, int phy, int reg, uint16_t val)
{
struct tulip_softc *sc = device_private(self);
/* AL981 only has an internal PHY. */
if (phy != 0)
return -1;
/*
* Whether or not we're in MII or SIA/SYM mode, the media info
* contains the appropriate OPMODE bits.
*
* Also, we always set the Must-Be-One bit.
*/
sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode;
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
}
/*
* tlp_2114x_mii_preinit:
*
* Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143.
* This version is used by boards which only have MII and don't have
* an ISV SROM.
*/
static void
tlp_2114x_mii_preinit(struct tulip_softc *sc)
{
/*
* Always set the Must-Be-One bit, and Port Select (to select MII).
* We'll never be called during a media change.
*/
sc->sc_opmode |= OPMODE_MBO | OPMODE_PS;
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
}
/*
* tlp_pnic_preinit:
*
* Pre-init function for the Lite-On 82c168 and 82c169.
*/
static void
tlp_pnic_preinit(struct tulip_softc *sc)
{
if (sc->sc_flags & TULIPF_HAS_MII) {
/*
* MII case: just set the port-select bit; we will never
* be called during a media change.
*/
sc->sc_opmode |= OPMODE_PS;
} else {
/*
* ENDEC/PCS/Nway mode; enable the Tx backoff counter.
*/
sc->sc_opmode |= OPMODE_PNIC_TBEN;
}
}
/*
* tlp_asix_preinit:
*
* Pre-init function for the ASIX chipsets.
*/
static void
tlp_asix_preinit(struct tulip_softc *sc)
{
case TULIP_CHIP_DM9102A:
/*
* XXX Figure out how to actually deal with the HomePNA
* XXX portion of the DM9102A.
*/
sc->sc_opmode |= OPMODE_MBO | OPMODE_HBD;
break;
default:
/* Nothing. */
break;
}
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
}
/*
* tlp_21140_reset:
*
* Issue a reset sequence on the 21140 via the GPIO facility.
*/
static void
tlp_21140_reset(struct tulip_softc *sc)
{
struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
struct tulip_21x4x_media *tm = ife->ifm_aux;
int i;
/* First, set the direction on the GPIO pins. */
TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
/* Now, issue the reset sequence. */
for (i = 0; i < tm->tm_reset_length; i++) {
delay(10);
TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]);
}
/* Now, issue the selection sequence. */
for (i = 0; i < tm->tm_gp_length; i++) {
delay(10);
TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]);
}
/* If there were no sequences, just lower the pins. */
if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
delay(10);
TULIP_WRITE(sc, CSR_GPP, 0);
}
}
/*
* tlp_21142_reset:
*
* Issue a reset sequence on the 21142 via the GPIO facility.
*/
static void
tlp_21142_reset(struct tulip_softc *sc)
{
struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur;
struct tulip_21x4x_media *tm = ife->ifm_aux;
const uint8_t *cp;
int i;
cp = &sc->sc_srom[tm->tm_reset_offset];
for (i = 0; i < tm->tm_reset_length; i++, cp += 2) {
delay(10);
TULIP_WRITE(sc, CSR_SIAGEN, TULIP_ROM_GETW(cp, 0) << 16);
}
cp = &sc->sc_srom[tm->tm_gp_offset];
for (i = 0; i < tm->tm_gp_length; i++, cp += 2) {
delay(10);
TULIP_WRITE(sc, CSR_SIAGEN, TULIP_ROM_GETW(cp, 0) << 16);
}
/* If there were no sequences, just lower the pins. */
if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
delay(10);
TULIP_WRITE(sc, CSR_SIAGEN, 0);
}
}
switch (sc->sc_chip) {
case TULIP_CHIP_82C115:
case TULIP_CHIP_MX98715:
case TULIP_CHIP_MX98715A:
case TULIP_CHIP_MX98725:
/*
* Set the LED operating mode. This information is located
* in the EEPROM at byte offset 0x77, per the MX98715A and
* MX98725 application notes.
*/
TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24);
break;
case TULIP_CHIP_MX98715AEC_X:
/*
* Set the LED operating mode. This information is located
* in the EEPROM at byte offset 0x76, per the MX98715AEC
* application note.
*/
TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28)
| ((0xf0 & sc->sc_srom[0x76]) << 20));
break;
default:
/* Nothing. */
break;
}
}
#if 0
/*
* tlp_dm9102_reset:
*
* Reset routine for the Davicom DM9102.
*/
static void
tlp_dm9102_reset(struct tulip_softc *sc)
{
/*****************************************************************************
* Chip/board-specific media switches. The ones here are ones that
* are potentially common to multiple front-ends.
*****************************************************************************/
/*
* This table is a common place for all sorts of media information,
* keyed off of the SROM media code for that media.
*
* Note that we explicitly configure the 21142/21143 to always advertise
* NWay capabilities when using the UTP port.
* XXX Actually, we don't yet.
*/
static const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = {
{ TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0,
"10baseT",
OPMODE_TTM,
BMSR_10THDX,
{ SIACONN_21040_10BASET,
SIATXRX_21040_10BASET,
SIAGEN_21040_10BASET },
switch (sc->sc_chip) {
case TULIP_CHIP_DE425:
case TULIP_CHIP_21040:
tm->tm_sia = tsti->tsti_21040; /* struct assignment */
break;
case TULIP_CHIP_21041:
tm->tm_sia = tsti->tsti_21041; /* struct assignment */
break;
case TULIP_CHIP_21142:
case TULIP_CHIP_21143:
case TULIP_CHIP_82C115:
case TULIP_CHIP_MX98715:
case TULIP_CHIP_MX98715A:
case TULIP_CHIP_MX98715AEC_X:
case TULIP_CHIP_MX98725:
tm->tm_sia = tsti->tsti_21142; /* struct assignment */
break;
default:
/* Nothing. */
break;
}
}
static void
tlp_add_srom_media(struct tulip_softc *sc, int type,
void (*get)(struct tulip_softc *, struct ifmediareq *),
int (*set)(struct tulip_softc *), const uint8_t *list,
int cnt)
{
struct tulip_21x4x_media *tm;
const struct tulip_srom_to_ifmedia *tsti;
int i;
for (i = 0; i < cnt; i++) {
tsti = tlp_srom_to_ifmedia(list[i]);
tm = kmem_zalloc(sizeof(*tm), KM_SLEEP);
tlp_srom_media_info(sc, tsti, tm);
tm->tm_type = type;
tm->tm_get = get;
tm->tm_set = set;
if ((sc->sc_media_seen &
~((1 << TULIP_ROM_MB_21140_MII) |
(1 << TULIP_ROM_MB_21142_MII))) == 0) {
/*
* We have not yet seen any SIA/SYM media (but are
* about to; that's why we're called!), so assign
* the current media instance to be the `internal media'
* instance, and advance it so any MII media gets a
* fresh one (used to selecting/isolating a PHY).
*/
sc->sc_tlp_minst = sc->sc_mii.mii_instance++;
}
}
/*
* Note that when we do SIA link tests, we are assuming that
* the chip is really in the mode that the current media setting
* reflects. If we're not, then the link tests will not be
* accurate!
*/
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_10_T:
sc->sc_flags |= TULIPF_LINK_VALID;
if ((siastat & SIASTAT_LS10) == 0)
sc->sc_flags |= TULIPF_LINK_UP;
break;
case IFM_100_TX:
case IFM_100_T4:
sc->sc_flags |= TULIPF_LINK_VALID;
if ((siastat & SIASTAT_LS100) == 0)
sc->sc_flags |= TULIPF_LINK_UP;
break;
}
switch (sc->sc_chip) {
case TULIP_CHIP_21142:
case TULIP_CHIP_21143:
/*
* On these chips, we can tell more information about
* AUI/BNC. Note that the AUI/BNC selection is made
* in a different register; for our purpose, it's all
* AUI.
*/
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_10_2:
case IFM_10_5:
sc->sc_flags |= TULIPF_LINK_VALID;
if (siastat & SIASTAT_ARA) {
TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA);
sc->sc_flags |= TULIPF_LINK_UP;
}
break;
default:
/*
* If we're SYM media and can detect the link
* via the GPIO facility, prefer that status
* over LS100.
*/
if (tm->tm_type == TULIP_ROM_MB_21143_SYM &&
tm->tm_actmask != 0) {
sc->sc_flags = (sc->sc_flags &
~TULIPF_LINK_UP) | TULIPF_LINK_VALID;
if (TULIP_ISSET(sc, CSR_SIAGEN,
tm->tm_actmask) == tm->tm_actdata)
sc->sc_flags |= TULIPF_LINK_UP;
}
}
break;
switch (sc->sc_chip) {
case TULIP_CHIP_82C115:
case TULIP_CHIP_MX98713A:
case TULIP_CHIP_MX98715:
case TULIP_CHIP_MX98715A:
case TULIP_CHIP_MX98715AEC_X:
case TULIP_CHIP_MX98725:
siaconn = PMAC_SIACONN_MASK;
siatxrx = PMAC_SIATXRX_MASK;
siagen = PMAC_SIAGEN_MASK;
break;
default:
/* No fixups required on any other chips. */
return;
}
/*
* XXX This appears to be necessary on a bunch of the clone chips.
*/
delay(20000);
/*
* Idle the chip.
*/
tlp_idle(sc, OPMODE_ST | OPMODE_SR);
/*
* Program the SIA. It's important to write in this order,
* resetting the SIA first.
*/
TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */
delay(1000);
/*
* Set the OPMODE bits for this media and write OPMODE.
* This will resume the transmit and receive processes.
*/
sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
/*
* Idle the chip.
*/
tlp_idle(sc, OPMODE_ST | OPMODE_SR);
/*
* Set the GPIO pins for this media, to flip any
* relays, etc.
*/
TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
delay(10);
TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata);
/*
* Set the OPMODE bits for this media and write OPMODE.
* This will resume the transmit and receive processes.
*/
sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode;
TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
if (tlp_isv_srom(sc->sc_srom) == 0) {
not_isv_srom:
/*
* If we have a board without the standard 21041 SROM format,
* we just assume all media are present and try and pick a
* reasonable default.
*/
tlp_add_srom_media(sc, 0, NULL, NULL, media, 4);
/*
* XXX Autosense not yet supported.
*/
/* XXX This should be auto-sense. */
ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_10_T);
tlp_print_media(sc);
return;
}
devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
for (i = 0; i < devcnt; i++) {
if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
break;
if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
sc->sc_devno)
break;
}
/*
* Ignore `instance'; we may get a mixture of SIA and MII
* media, and `instance' is used to isolate or select the
* PHY on the MII as appropriate. Note that duplicate media
* are disallowed, so ignoring `instance' is safe.
*/
ifmedia_init(&mii->mii_media, IFM_IMASK, tlp_mediachange,
tlp_mediastatus);
devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT];
for (i = 0; i < devcnt; i++) {
if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1)
break;
if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] ==
sc->sc_devno)
break;
}
if (i == devcnt) {
aprint_error_dev(sc->sc_dev,
"unable to locate info leaf in SROM\n");
return;
}
/*
* On some chips, the first thing in the Info Leaf is the
* GPIO pin direction data.
*/
switch (sc->sc_chip) {
case TULIP_CHIP_21140:
case TULIP_CHIP_21140A:
case TULIP_CHIP_MX98713:
case TULIP_CHIP_AX88140:
case TULIP_CHIP_AX88141:
sc->sc_gp_dir = *cp++;
break;
for (; m_cnt != 0; cp = ncp, m_cnt--) {
/*
* Determine the type and length of this media block.
* The 21143 is spec'd to always use extended format blocks,
* but some cards don't set the bit to indicate this.
* Hopefully there are no cards which really don't use
* extended format blocks.
*/
if ((*cp & 0x80) == 0 && sc->sc_chip != TULIP_CHIP_21143) {
length = 4;
type = TULIP_ROM_MB_21140_GPR;
} else {
length = (*cp++ & 0x7f) - 1;
type = *cp++ & 0x3f;
}
/* Compute the start of the next block. */
ncp = cp + length;
/* Now, parse the block. */
switch (type) {
case TULIP_ROM_MB_21140_GPR:
tlp_get_minst(sc);
sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR;
/* First is the media type code. */
tsti = tlp_srom_to_ifmedia(cp[0] &
TULIP_ROM_MB_MEDIA_CODE);
if (tsti == NULL) {
/* Invalid media code. */
free(tm, M_DEVBUF);
break;
}
/* Get defaults. */
tlp_srom_media_info(sc, tsti, tm);
/* Next is any GPIO info for this media. */
tm->tm_gpdata = cp[1];
/*
* Next is a word containing OPMODE information
* and info on how to detect if this media is
* active.
*/
word = TULIP_ROM_GETW(cp, 2);
tm->tm_opmode &= OPMODE_FD;
tm->tm_opmode |= TULIP_ROM_MB_OPMODE(word);
if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
tm->tm_actmask =
TULIP_ROM_MB_BITPOS(word);
tm->tm_actdata =
(word & TULIP_ROM_MB_POLARITY) ?
0 : tm->tm_actmask;
}
if (sc->sc_reset == NULL)
sc->sc_reset = tlp_21140_reset;
/* First is the PHY number. */
tm->tm_phyno = *cp++;
/* Next is the MII select sequence length and offset. */
tm->tm_gp_length = *cp++;
tm->tm_gp_offset = cp - &sc->sc_srom[0];
cp += tm->tm_gp_length;
/* Next is the MII reset sequence length and offset. */
tm->tm_reset_length = *cp++;
tm->tm_reset_offset = cp - &sc->sc_srom[0];
cp += tm->tm_reset_length;
/*
* The following items are left in the media block
* that we don't particularly care about:
*
* capabilities W
* advertisement W
* full duplex W
* tx threshold W
*
* These appear to be bits in the PHY registers,
* which our MII code handles on its own.
*/
/*
* Before we probe the MII bus, we need to reset
* it and issue the selection sequence.
*/
/* Set the direction of the pins... */
TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
for (i = 0; i < tm->tm_reset_length; i++) {
delay(10);
TULIP_WRITE(sc, CSR_GPP,
sc->sc_srom[tm->tm_reset_offset + i]);
}
for (i = 0; i < tm->tm_gp_length; i++) {
delay(10);
TULIP_WRITE(sc, CSR_GPP,
sc->sc_srom[tm->tm_gp_offset + i]);
}
/* If there were no sequences, just lower the pins. */
if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
delay(10);
TULIP_WRITE(sc, CSR_GPP, 0);
}
/*
* Now, probe the MII for the PHY. Note, we know
* the location of the PHY on the bus, but we don't
* particularly care; the MII code just likes to
* search the whole thing anyhow.
*/
mii_attach(sc->sc_dev, mii, 0xffffffff,
MII_PHY_ANY, tm->tm_phyno, 0);
/*
* Now, search for the PHY we hopefully just
* configured. If it's not configured into the
* kernel, we lose. The PHY's default media always
* takes priority.
*/
LIST_FOREACH(phy, &mii->mii_phys, mii_list) {
if (phy->mii_offset == tm->tm_phyno)
break;
}
if (phy == NULL) {
aprint_error_dev(sc->sc_dev,
"unable to configure MII\n");
break;
}
/*
* Okay, now that we've found the PHY and the MII
* layer has added all of the media associated
* with that PHY, we need to traverse the media
* list, and add our `tm' to each entry's `aux'
* pointer.
*
* We do this by looking for media with our
* PHY's `instance'.
*/
TAILQ_FOREACH(ife, &mii->mii_media.ifm_list,
ifm_list) {
if (IFM_INST(ife->ifm_media) != phy->mii_inst)
continue;
ife->ifm_aux = tm;
}
break;
case TULIP_ROM_MB_21142_SIA:
tlp_get_minst(sc);
sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA;
/* First is the media type code. */
tsti = tlp_srom_to_ifmedia(cp[0] &
TULIP_ROM_MB_MEDIA_CODE);
if (tsti == NULL) {
/* Invalid media code. */
free(tm, M_DEVBUF);
break;
}
/* Get defaults. */
tlp_srom_media_info(sc, tsti, tm);
/*
* Override our default SIA settings if the
* SROM contains its own.
*/
if (cp[0] & 0x40) {
tm->tm_siaconn = TULIP_ROM_GETW(cp, 1);
tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3);
tm->tm_siagen = TULIP_ROM_GETW(cp, 5);
cp += 7;
} else
cp++;
/* Next is GPIO control/data. */
tm->tm_gpctl = TULIP_ROM_GETW(cp, 0) << 16;
tm->tm_gpdata = TULIP_ROM_GETW(cp, 2) << 16;
if (sc->sc_reset == NULL)
sc->sc_reset = tlp_21142_reset;
/* First is the PHY number. */
tm->tm_phyno = *cp++;
/* Next is the MII select sequence length and offset. */
tm->tm_gp_length = *cp++;
tm->tm_gp_offset = cp - &sc->sc_srom[0];
cp += tm->tm_gp_length * 2;
/* Next is the MII reset sequence length and offset. */
tm->tm_reset_length = *cp++;
tm->tm_reset_offset = cp - &sc->sc_srom[0];
cp += tm->tm_reset_length * 2;
/*
* The following items are left in the media block
* that we don't particularly care about:
*
* capabilities W
* advertisement W
* full duplex W
* tx threshold W
* MII interrupt W
*
* These appear to be bits in the PHY registers,
* which our MII code handles on its own.
*/
/*
* Before we probe the MII bus, we need to reset
* it and issue the selection sequence.
*/
cp = &sc->sc_srom[tm->tm_reset_offset];
for (i = 0; i < tm->tm_reset_length; i++, cp += 2) {
delay(10);
TULIP_WRITE(sc, CSR_SIAGEN,
TULIP_ROM_GETW(cp, 0) << 16);
}
cp = &sc->sc_srom[tm->tm_gp_offset];
for (i = 0; i < tm->tm_gp_length; i++, cp += 2) {
delay(10);
TULIP_WRITE(sc, CSR_SIAGEN,
TULIP_ROM_GETW(cp, 0) << 16);
}
/* If there were no sequences, just lower the pins. */
if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) {
delay(10);
TULIP_WRITE(sc, CSR_SIAGEN, 0);
}
/*
* Now, probe the MII for the PHY. Note, we know
* the location of the PHY on the bus, but we don't
* particularly care; the MII code just likes to
* search the whole thing anyhow.
*/
mii_attach(sc->sc_dev, mii, 0xffffffff,
MII_PHY_ANY, tm->tm_phyno, 0);
/*
* Now, search for the PHY we hopefully just
* configured. If it's not configured into the
* kernel, we lose. The PHY's default media always
* takes priority.
*/
LIST_FOREACH(phy, &mii->mii_phys, mii_list) {
if (phy->mii_offset == tm->tm_phyno)
break;
}
if (phy == NULL) {
aprint_error_dev(sc->sc_dev,
"unable to configure MII\n");
break;
}
/*
* Okay, now that we've found the PHY and the MII
* layer has added all of the media associated
* with that PHY, we need to traverse the media
* list, and add our `tm' to each entry's `aux'
* pointer.
*
* We do this by looking for media with our
* PHY's `instance'.
*/
TAILQ_FOREACH(ife, &mii->mii_media.ifm_list,
ifm_list) {
if (IFM_INST(ife->ifm_media) != phy->mii_inst)
continue;
ife->ifm_aux = tm;
}
break;
case TULIP_ROM_MB_21143_SYM:
tlp_get_minst(sc);
sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM;
/* First is the media type code. */
tsti = tlp_srom_to_ifmedia(cp[0] &
TULIP_ROM_MB_MEDIA_CODE);
if (tsti == NULL) {
/* Invalid media code. */
free(tm, M_DEVBUF);
break;
}
/* Get defaults. */
tlp_srom_media_info(sc, tsti, tm);
/* Next is GPIO control/data. */
tm->tm_gpctl = TULIP_ROM_GETW(cp, 1) << 16;
tm->tm_gpdata = TULIP_ROM_GETW(cp, 3) << 16;
/*
* Next is a word containing OPMODE information
* and info on how to detect if this media is
* active.
*/
word = TULIP_ROM_GETW(cp, 5);
tm->tm_opmode &= OPMODE_FD;
tm->tm_opmode |= TULIP_ROM_MB_OPMODE(word);
if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) {
tm->tm_actmask =
TULIP_ROM_MB_BITPOS(word);
tm->tm_actdata =
(word & TULIP_ROM_MB_POLARITY) ?
0 : tm->tm_actmask;
}
case TULIP_ROM_MB_21143_RESET:
aprint_normal_dev(sc->sc_dev, "21143 reset block\n");
break;
default:
aprint_error_dev(sc->sc_dev,
"unknown ISV media block type 0x%02x\n", type);
}
}
/*
* Deal with the case where no media is configured.
*/
if (TAILQ_FIRST(&mii->mii_media.ifm_list) == NULL) {
aprint_error_dev(sc->sc_dev, "no media found!\n");
ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
return;
}
/*
* Pick the default media.
*/
if (miidef != 0)
defmedia = miidef;
else {
switch (sc->sc_chip) {
case TULIP_CHIP_21140:
case TULIP_CHIP_21140A:
/* XXX should come from SROM */
defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0);
if (ifmedia_match(&mii->mii_media, defmedia,
mii->mii_media.ifm_mask) == NULL) {
/*
* There is not a 10baseT media.
* Fall back to the first found one.
*/
ife = TAILQ_FIRST(&mii->mii_media.ifm_list);
defmedia = ife->ifm_media;
}
break;
case TULIP_CHIP_21142:
case TULIP_CHIP_21143:
case TULIP_CHIP_MX98713A:
case TULIP_CHIP_MX98715:
case TULIP_CHIP_MX98715A:
case TULIP_CHIP_MX98715AEC_X:
case TULIP_CHIP_MX98725:
tm = kmem_zalloc(sizeof(*tm), KM_SLEEP);
tm->tm_name = "auto";
tm->tm_get = tlp_2114x_nway_get;
tm->tm_set = tlp_2114x_nway_set;
if (IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)
return;
if ((ife = ifmedia_match(&mii->mii_media, mii->mii_media_active,
mii->mii_media.ifm_mask)) == NULL) {
printf("tlp_2114x_nway_statchg: no match for media 0x%x/0x%x\n",
mii->mii_media_active, ~mii->mii_media.ifm_mask);
panic("tlp_2114x_nway_statchg");
}
/*
* Support for the 2114X internal NWay block. This is constructed
* somewhat like a PHY driver for simplicity.
*/
static int
tlp_2114x_nway_service(struct tulip_softc *sc, int cmd)
{
struct mii_data *mii = &sc->sc_mii;
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
return 0;
switch (cmd) {
case MII_POLLSTAT:
/* Nothing special to do here. */
break;
case MII_MEDIACHG:
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_AUTO:
goto restart;
default:
/* Manual setting doesn't go through here. */
printf("tlp_2114x_nway_service: oops!\n");
return EINVAL;
}
break;
case MII_TICK:
/*
* Only used for autonegotiation.
*/
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
break;
/*
* Check to see if we have link. If we do, we don't
* need to restart the autonegotiation process.
*/
#if 0
if (mii->mii_media_status & IFM_ACTIVE)
#else
if (sc->sc_flags & TULIPF_LINK_UP)
#endif
break;
/*
* Only retry autonegotiation every 5 seconds.
*/
if (++sc->sc_nway_ticks != (5 << 3))
break;
/* Compute the link code word to advertise. */
if (sc->sc_sia_cap & BMSR_100T4)
siatxrx |= SIATXRX_T4;
if (sc->sc_sia_cap & BMSR_100TXFDX)
siatxrx |= SIATXRX_TXF;
if (sc->sc_sia_cap & BMSR_100TXHDX)
siatxrx |= SIATXRX_THX;
if (sc->sc_sia_cap & BMSR_10TFDX)
sc->sc_opmode |= OPMODE_FD;
if (sc->sc_sia_cap & BMSR_10THDX)
siatxrx |= SIATXRX_TH;
if (siatxrx & SIATXRX_ANE) {
if ((siastat & SIASTAT_ANS) != SIASTAT_ANS_FLPGOOD) {
/* Erg, still trying, I guess... */
mii->mii_media_active |= IFM_NONE;
return;
}
if (~siastat & (SIASTAT_LS10 | SIASTAT_LS100))
mii->mii_media_status |= IFM_ACTIVE;
if (siastat & SIASTAT_LPN) {
anlpar = SIASTAT_GETLPC(siastat);
if (anlpar & ANLPAR_T4 &&
sc->sc_sia_cap & BMSR_100T4)
mii->mii_media_active |= IFM_100_T4;
else if (anlpar & ANLPAR_TX_FD &&
sc->sc_sia_cap & BMSR_100TXFDX)
mii->mii_media_active |= IFM_100_TX | IFM_FDX;
else if (anlpar & ANLPAR_TX &&
sc->sc_sia_cap & BMSR_100TXHDX)
mii->mii_media_active |= IFM_100_TX;
else if (anlpar & ANLPAR_10_FD &&
sc->sc_sia_cap & BMSR_10TFDX)
mii->mii_media_active |= IFM_10_T | IFM_FDX;
else if (anlpar & ANLPAR_10 &&
sc->sc_sia_cap & BMSR_10THDX)
mii->mii_media_active |= IFM_10_T;
else
mii->mii_media_active |= IFM_NONE;
} else {
/*
* If the other side doesn't support NWAY, then the
* best we can do is determine if we have a 10Mbps or
* 100Mbps link. There's no way to know if the link
* is full or half duplex, so we default to half duplex
* and hope that the user is clever enough to manually
* change the media settings if we're wrong.
*/
if ((siastat & SIASTAT_LS100) == 0)
mii->mii_media_active |= IFM_100_TX;
else if ((siastat & SIASTAT_LS10) == 0)
mii->mii_media_active |= IFM_10_T;
else
mii->mii_media_active |= IFM_NONE;
}
} else {
if (~siastat & (SIASTAT_LS10 | SIASTAT_LS100))
mii->mii_media_status |= IFM_ACTIVE;
if (sc->sc_opmode & OPMODE_TTM)
mii->mii_media_active |= IFM_10_T;
else
mii->mii_media_active |= IFM_100_TX;
if (sc->sc_opmode & OPMODE_FD)
mii->mii_media_active |= IFM_FDX;
}
}
/*
* Check to see if we need to reset the chip, and do it. The
* reset path will get the OPMODE register right the next
* time through.
*/
if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode))
return tlp_init(&sc->sc_ethercom.ec_if);
return (*tm->tm_set)(sc);
}
/*
* MII-on-SIO media switch. Handles only MII attached to the SIO.
*/
static void tlp_sio_mii_tmsw_init(struct tulip_softc *);
/*
* We don't attach any media info structures to the ifmedia
* entries, so if we're using a pre-init function that needs
* that info, override it to one that doesn't.
*/
if (sc->sc_preinit == tlp_2114x_preinit)
sc->sc_preinit = tlp_2114x_mii_preinit;
/*
* Support for the Lite-On PNIC internal NWay block. This is constructed
* somewhat like a PHY driver for simplicity.
*/
static int
tlp_pnic_nway_service(struct tulip_softc *sc, int cmd)
{
struct mii_data *mii = &sc->sc_mii;
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
return 0;
switch (cmd) {
case MII_POLLSTAT:
/* Nothing special to do here. */
break;
case MII_MEDIACHG:
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_AUTO:
(void) tlp_pnic_nway_auto(sc, 1);
break;
case IFM_100_T4:
/*
* XXX Not supported as a manual setting right now.
*/
return EINVAL;
default:
/*
* NWAY register data is stored in the ifmedia entry.
*/
TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
}
break;
case MII_TICK:
/*
* Only used for autonegotiation.
*/
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
return 0;
/*
* Check to see if we have link. If we do, we don't
* need to restart the autonegotiation process.
*/
if (sc->sc_flags & TULIPF_LINK_UP)
return 0;
/*
* Only retry autonegotiation every 5 seconds.
*/
if (++sc->sc_nway_ticks != 5)
return 0;
static int
tlp_pnic_nway_auto(struct tulip_softc *sc, int waitfor)
{
struct mii_data *mii = &sc->sc_mii;
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
uint32_t reg;
int i;
if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0)
TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data);
if (waitfor) {
/* Wait 500ms for it to complete. */
for (i = 0; i < 500; i++) {
reg = TULIP_READ(sc, CSR_PNIC_NWAY);
if (reg & PNIC_NWAY_LPAR_MASK) {
tlp_pnic_nway_acomp(sc);
return 0;
}
delay(1000);
}
#if 0
if ((reg & PNIC_NWAY_LPAR_MASK) == 0)
aprint_error_dev(sc->sc_dev,
"autonegotiation failed to complete\n");
#endif
/*
* Don't need to worry about clearing DOINGAUTO.
* If that's set, a timeout is pending, and it will
* clear the flag.
*/
return EIO;
}
/*
* Just let it finish asynchronously. This is for the benefit of
* the tick handler driving autonegotiation. Don't want 500ms
* delays all the time while the system is running!
*/
if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) {
sc->sc_flags |= TULIPF_DOINGAUTO;
callout_reset(&sc->sc_nway_callout, hz >> 1,
tlp_pnic_nway_auto_timeout, sc);
}
return EJUSTRETURN;
}
if (reg & (PNIC_NWAY_LPAR100TXFDX | PNIC_NWAY_LPAR100TX))
reg |= PNIC_NWAY_100;
if (reg & (PNIC_NWAY_LPAR10TFDX | PNIC_NWAY_LPAR100TXFDX))
reg |= PNIC_NWAY_FD;
TULIP_WRITE(sc, CSR_PNIC_NWAY, reg);
}
/*
* Macronix PMAC and Lite-On PNIC-II media switch:
*
* MX98713 and MX98713A 21140-like MII or GPIO media.
*
* MX98713A 21143-like MII or SIA/SYM media.
*
* MX98715, MX98715A, MX98725, 21143-like SIA/SYM media.
* 82C115, MX98715AEC-C, -E
*
* So, what we do here is fake MII-on-SIO or ISV media info, and
* use the ISV media switch get/set functions to handle the rest.
*/
/*
* XXX Should implement auto-sense for this someday,
* XXX when we do the same for the 21140.
*/
ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_10_T);
break;
/*
* ADMtek AN983/985 media switch. Only has internal PHY, but
* on an SIO-like interface. Unfortunately, we can't use the
* standard SIO media switch, because the AN985 "ghosts" the
* singly PHY at every address.
*/
static void tlp_an985_tmsw_init(struct tulip_softc *);
/*
* We don't attach any media info structures to the ifmedia
* entries, so if we're using a pre-init function that needs
* that info, override it to one that doesn't.
*/
if (sc->sc_preinit == tlp_2114x_preinit)
sc->sc_preinit = tlp_2114x_mii_preinit;
