/*-
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Control structures are DMA'd to the EPIC chip. We allocate them in
* a single clump that maps to a single DMA segment to make several things
* easier.
*/
struct epic_control_data {
/*
* The transmit descriptors.
*/
struct epic_txdesc ecd_txdescs[EPIC_NTXDESC];
/*
* The receive descriptors.
*/
struct epic_rxdesc ecd_rxdescs[EPIC_NRXDESC];
/*
* The transmit fraglists.
*/
struct epic_fraglist ecd_txfrags[EPIC_NTXDESC];
};
/*
* Software state for transmit and receive descriptors.
*/
struct epic_descsoft {
struct mbuf *ds_mbuf; /* head of mbuf chain */
bus_dmamap_t ds_dmamap; /* our DMA map */
};
/*
* Software state per device.
*/
struct epic_softc {
device_t sc_dev; /* generic device information */
bus_space_tag_t sc_st; /* bus space tag */
bus_space_handle_t sc_sh; /* bus space handle */
bus_dma_tag_t sc_dmat; /* bus DMA tag */
struct ethercom sc_ethercom; /* ethernet common data */
int sc_hwflags; /* info about board */
#define EPIC_HAS_BNC 0x01 /* BNC on serial interface */
#define EPIC_HAS_MII_FIBER 0x02 /* fiber on MII lxtphy */
#define EPIC_DUPLEXLED_ON_694 0x04 /* duplex LED by software */
struct mii_data sc_mii; /* MII/media information */
struct callout sc_mii_callout; /* MII callout */
bus_dmamap_t sc_cddmamap; /* control data DMA map */
#define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
bus_dmamap_t sc_nulldmamap; /* DMA map for the pad buffer */
#define sc_nulldma sc_nulldmamap->dm_segs[0].ds_addr
/*
* Software state for transmit and receive descriptors.
*/
struct epic_descsoft sc_txsoft[EPIC_NTXDESC];
struct epic_descsoft sc_rxsoft[EPIC_NRXDESC];
/*
* Control data structures.
*/
struct epic_control_data *sc_control_data;
int sc_txpending; /* number of TX requests pending */
int sc_txdirty; /* first dirty TX descriptor */
int sc_txlast; /* last used TX descriptor */
int sc_rxptr; /* next ready RX descriptor */
u_int sc_serinst; /* ifmedia instance for serial mode */
};
