/*-
* Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas of 3am Software Foundry and Martin Husemann.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Rx and Tx Ring counts that map into single 4K page with 16byte descriptor
* size. For Rx a full mbuf cluster is allocated for each which consumes
* around 512k Byte of RAM for mbuf clusters.
* XXX Maybe fine-tune later, or reconsider unsharing of RX/TX dmamap.
*/
#define AWGE_RX_RING_COUNT 256
#define AWGE_TX_RING_COUNT 256
#define AWGE_TOTAL_RING_COUNT \
(AWGE_RX_RING_COUNT + AWGE_TX_RING_COUNT)
struct dwc_gmac_tx_ring {
bus_addr_t t_physaddr; /* PA of TX ring start */
struct dwc_gmac_dev_dmadesc *t_desc; /* VA of TX ring start */
struct dwc_gmac_tx_data t_data[AWGE_TX_RING_COUNT];
int t_cur, t_next, t_queued;
kmutex_t t_mtx;
};
struct dwc_gmac_rx_ring {
bus_addr_t r_physaddr; /* PA of RX ring start */
struct dwc_gmac_dev_dmadesc *r_desc; /* VA of RX ring start */
struct dwc_gmac_rx_data r_data[AWGE_RX_RING_COUNT];
int r_cur, r_next;
kmutex_t r_mtx;
};
struct dwc_gmac_softc {
device_t sc_dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bsh;
bus_dma_tag_t sc_dmat;
uint32_t sc_flags;
#define DWC_GMAC_FORCE_THRESH_DMA_MODE __BIT(0)/* force DMA to use threshold mode */
struct ethercom sc_ec;
struct mii_data sc_mii;
kmutex_t sc_mdio_lock;
bus_dmamap_t sc_dma_ring_map; /* common dma memory for RX */
bus_dma_segment_t sc_dma_ring_seg; /* and TX ring */
struct dwc_gmac_rx_ring sc_rxq;
struct dwc_gmac_tx_ring sc_txq;
const struct dwc_gmac_desc_methods *sc_descm;
u_short sc_if_flags; /* (sc_mcastlock) if_flags cache */
uint16_t sc_mii_clk;
bool sc_txbusy; /* (sc_txq.t_mtx) no Tx because down or busy */
bool sc_stopping; /* (sc_intr_lock) ignore intr because down */
krndsource_t rnd_source;
kmutex_t *sc_mcast_lock; /* lock for SIOCADD/DELMULTI */
kmutex_t *sc_intr_lock; /* lock for interrupt operations */
