/* $NetBSD: uba_bi.c,v 1.16 2024/02/04 18:52:35 andvar Exp $ */
/*
* Copyright (c) 1998 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of
* Lule}, Sweden and its contributors.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* bua_map -- in particular, those bits that are not in DW780s & DW750s */
#define BUAMR_IOADR 0x40000000 /* I/O address space */
#define BUAMR_LAE 0x04000000 /* longword access enable */
struct dwbua_regs {
struct biiregs bn_biic; /* interface */
int pad1[396];
int bn_csr;
int bn_vor; /* Vector offset from SCB */
int bn_fubar; /* Failed Unibus address register */
int bn_bifar; /* BI failed address register */
int bn_mdiag[5]; /* microdiag regs for BDP */
int pad2[3];
int bn_dpcsr[6]; /* Data path control and status register */
int pad3[38];
struct pte bn_map[UBAPAGES]; /* Unibus map registers */
int pad4[UBAIOPAGES];
};
/*
* Poke at a supposed DWBUA to see if it is there.
*/
static int
uba_bi_match(device_t parent, cfdata_t cf, void *aux)
{
struct bi_attach_args *ba = aux;
if ((ba->ba_node->biic.bi_dtype != BIDT_DWBUA) &&
(ba->ba_node->biic.bi_dtype != BIDT_KLESI))
return 0;
if (cf->cf_loc[BICF_NODE] != BICF_NODE_DEFAULT &&
cf->cf_loc[BICF_NODE] != ba->ba_nodenr)
return 0;
if (ba->ba_node->biic.bi_dtype == BIDT_DWBUA)
printf(": DWBUA\n");
else
printf(": KLESI-B\n");
/*
* Fill in bus specific data.
*/
sc->uh_dev = self;
sc->uh_uba = (void *)ba->ba_node;
sc->uh_nbdp = NBDPBUA;
/* sc->uh_nr is 0; uninteresting here */
/* sc->uh_afterscan; not used */
/* sc->uh_errchk; not used */
/* sc->uh_beforescan */
sc->uh_ubapurge = bua_purge;
sc->uh_ubainit = bua_init;
/* sc->uh_type not used */
sc->uh_memsize = UBAPAGES;
sc->uh_mr = BUA(sc->uh_uba)->bn_map;
#ifdef notdef
/* Can we get separate interrupts? */
scb->scb_nexvec[1][ba->ba_nodenr] = &sc->sc_ivec;
#endif
BUA(sc->uh_uba)->bn_biic.bi_csr |= BICSR_ARB_NONE;
BUA(sc->uh_uba)->bn_biic.bi_csr |= BICSR_STS | BICSR_INIT;
DELAY(1000);
timo = 1000;
while (BUA(sc->uh_uba)->bn_biic.bi_csr & BICSR_BROKE)
if (timo == 0) {
aprint_error_dev(self, "BROKE bit set\n");
return;
}