/* $NetBSD: bireg.h,v 1.10 2005/12/11 12:21:15 christos Exp $ */
/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Chris Torek.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)bireg.h 7.3 (Berkeley) 6/28/90
*/
/*
* VAXBI node definitions.
*/
/*
* BI node addresses
*/
#define BI_NODESIZE 0x2000 /* Size of one BI node */
#define BI_NODE(node) (BI_NODESIZE * (node))
#define BI_BASE(bi,nod) ((0x20000000 + (bi) * 0x2000000) + BI_NODE(nod))
#define MAXNBI 16 /* Spec says there can be 16 anyway */
#define NNODEBI 16 /* 16 nodes per BI */
#define BI_PROBE 0x80000 /* CPU on 8200, NBIA on 8800 */
/*
* BI nodes all start with BI interface registers (those on the BIIC chip).
* These are followed with interface-specific registers.
*
* NB: This structure does NOT include the four GPRs (not anymore!)
*
* 990712: The structs not used anymore due to conversion to bus.h.
*/
#ifdef notdef
struct biiregs {
u_short bi_dtype; /* device type */
u_short bi_revs; /* revisions */
u_long bi_csr; /* control and status register */
u_long bi_ber; /* bus error register */
u_long bi_eintrcsr; /* error interrupt control register */
u_long bi_intrdes; /* interrupt destination register */
/* the rest are not required for all nodes */
u_long bi_ipintrmsk; /* IP interrupt mask register */
u_long bi_fipsdes; /* Force-Bit IPINTR/STOP destination reg */
u_long bi_ipintrsrc; /* IPINTR source register */
u_long bi_sadr; /* starting address register */
u_long bi_eadr; /* ending address register */
u_long bi_bcicsr; /* BCI control and status register */
u_long bi_wstat; /* write status register */
u_long bi_fipscmd; /* Force-Bit IPINTR/STOP command reg */
u_long bi_xxx1[3]; /* unused */
u_long bi_uintrcsr; /* user interface interrupt control reg */
u_long bi_xxx2[43]; /* unused */
/* although these are on the BIIC, their interpretation varies */
/* u_long bi_gpr[4]; */ /* general purpose registers */
};
/*
* A generic BI node.
*/
struct bi_node {
struct biiregs biic; /* interface */
u_long bi_xxx[1988]; /* pad to 8K */
};
/*
* A CPU node.
*/
struct bi_cpu {
struct biiregs biic; /* interface chip */
u_long bi_gpr[4]; /* gprs (unused) */
u_long bi_sosr; /* slave only status register */
u_long bi_xxx[63]; /* pad */
u_long bi_rxcd; /* receive console data register */
};
#endif
/* bits in bi_wstat */
#define BIW_GPR3 0x80000000 /* gpr 3 was written */
#define BIW_GPR2 0x40000000 /* gpr 2 was written */
#define BIW_GPR1 0x20000000 /* gpr 1 was written */
#define BIW_GPR0 0x10000000 /* gpr 0 was written */
