/*
* Copyright (c) 1994 Paul Kranenburg. All rights reserved.
* Copyright (c) 1994 Peter Galbavy. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Peter Galbavy.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Make sure the DMA chip is supported revision.
* The Sun3/80 used only the old rev zero chip,
* so the initialization has been simplified.
*/
switch (sc->sc_rev) {
case DMAREV_0:
case DMAREV_1:
break;
default:
panic("unsupported dma rev");
}
}
/*
* This is called by espattach to get our softc.
*/
struct dma_softc *
espdmafind(int unit)
{
struct dma_softc *dma;
dma = device_lookup_private(&dma_cd, unit);
if (dma == NULL)
panic("%s: no dma", __func__);
return dma;
}
#define DMAWAIT(SC, COND, MSG, DONTPANIC) do if (COND) { \
int count = 100000; \
while ((COND) && --count > 0) \
DELAY(5); \
if (count == 0) { \
printf("%s: line %d: CSR = 0x%x\n", \
__FILE__, __LINE__, DMA_GCSR(SC)); \
if (DONTPANIC) \
printf(MSG); \
else \
panic(MSG); \
} \
} while (/* CONSTCOND */0)
#define DMA_DRAIN(sc, dontpanic) do { \
uint32_t _csr; \
/* \
* DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
* and "drain" bits while it is still thinking about a \
* request. \
* other revs: D_R_PEND bit reads as 0 \
*/ \
DMAWAIT(sc, DMA_GCSR(sc) & D_R_PEND, "R_PEND", dontpanic); \
/* \
* Select drain bit (always rev 0,1) \
* also clears errors and D_TC flag \
*/ \
_csr = DMA_GCSR(sc); \
_csr |= D_DRAIN; \
DMA_SCSR(sc, _csr); \
/* \
* Wait for draining to finish \
*/ \
DMAWAIT(sc, DMA_GCSR(sc) & D_PACKCNT, "DRAINING", dontpanic); \
} while (/* CONSTCOND */0)
#define DMA_FLUSH(sc, dontpanic) do { \
uint32_t _csr; \
/* \
* DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
* and "drain" bits while it is still thinking about a \
* request. \
* other revs: D_R_PEND bit reads as 0 \
*/ \
DMAWAIT(sc, DMA_GCSR(sc) & D_R_PEND, "R_PEND", dontpanic); \
_csr = DMA_GCSR(sc); \
_csr &= ~(D_WRITE|D_EN_DMA); \
DMA_SCSR(sc, _csr); \
_csr |= D_FLUSH; \
DMA_SCSR(sc, _csr); \
} while (/* CONSTCOND */0)
if (sc->sc_dmamap->dm_nsegs > 0)
bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap);
DMA_FLUSH(sc, 1);
csr = DMA_GCSR(sc);
csr |= D_RESET; /* reset DMA */
DMA_SCSR(sc, csr);
DELAY(200); /* what should this be ? */
/*DMAWAIT1(sc); why was this here? */
csr = DMA_GCSR(sc);
csr &= ~D_RESET; /* de-assert reset line */
DMA_SCSR(sc, csr);
DELAY(5); /* allow a few ticks to settle */
/*
* Get transfer burst size from (?) and plug it into the
* controller registers. This is needed on the Sun4m...
* Do we need it too? Apparently not, because the 3/80
* always has the old, REV zero DMA chip.
*/
csr = DMA_GCSR(sc);
csr |= D_INT_EN; /* enable interrupts */
/*
* the rules say we cannot transfer more than the limit
* of this DMA chip (64k for old and 16Mb for new),
* and we cannot cross a 16Mb boundary.
*/
*dmasize = sc->sc_dmasize =
uimin(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr));
/*
* Pseudo (chained) interrupt from the esp driver to kick the
* current running DMA transfer. I am relying on espintr() to
* pickup and clean errors for now
*
* return 1 if it was a DMA continue.
*/
int
espdmaintr(struct dma_softc *sc)
{
struct ncr53c9x_softc *nsc = sc->sc_client;
char bits[64];
int trans, resid;
uint32_t csr;
resid = 0;
/*
* If a transfer onto the SCSI bus gets interrupted by the device
* (e.g. for a SAVEPOINTER message), the data in the FIFO counts
* as residual since the ESP counter registers get decremented as
* bytes are clocked into the FIFO.
*/
if (!(csr & D_WRITE) &&
(resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
NCR_DMA(("%s: empty esp FIFO of %d ", __func__, resid));
}
if ((nsc->sc_espstat & NCRSTAT_TC) == 0) {
/*
* `Terminal count' is off, so read the residue
* out of the ESP counter registers.
*/
resid += (NCR_READ_REG(nsc, NCR_TCL) |
(NCR_READ_REG(nsc, NCR_TCM) << 8) |
((nsc->sc_cfg2 & NCRCFG2_FE) ?
(NCR_READ_REG(nsc, NCR_TCH) << 16) : 0));
if (resid == 0 && sc->sc_dmasize == 65536 &&
(nsc->sc_cfg2 & NCRCFG2_FE) == 0)
/* A transfer of 64K is encoded as `TCL=TCM=0' */
resid = 65536;
}
trans = sc->sc_dmasize - resid;
if (trans < 0) { /* transferred < 0 ? */
#if 0
/*
* This situation can happen in perfectly normal operation
* if the ESP is reselected while using DMA to select
* another target. As such, don't print the warning.
*/
printf("%s: xfer (%d) > req (%d)\n",
device_xname(sc->sc_dev), trans, sc->sc_dmasize);
#endif
trans = sc->sc_dmasize;
}
