/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Gordon W. Ross.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Zilog Z8530 Dual UART driver (machine-dependent part)
*
* Runs two serial lines per chip using slave drivers.
* Plain tty/async lines use the zs_async slave.
* Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
*/
/* Make life easier for the initialized arrays here. */
#if NZS < 3
#undef NZS
#define NZS 3
#endif
/*
* Some warts needed by z8530tty.c -
* The default parity REALLY needs to be the same as the PROM uses,
* or you can not see messages done with printf during boot-up...
*/
int zs_def_cflag = (CREAD | CS8 | HUPCL);
/*
* The Sun provides a 4.9152 MHz clock to the ZS chips.
*/
#define PCLK (9600 * 512) /* PCLK pin input clock rate */
#define ZS_DELAY()
/* The layout of this is hardware-dependent (padding, order). */
struct zschan {
volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
uint8_t zc_xxx0;
volatile uint8_t zc_data; /* data */
uint8_t zc_xxx1;
};
struct zsdevice {
/* Yes, they are backwards. */
struct zschan zs_chan_b;
struct zschan zs_chan_a;
};
/* ZS channel used as the console device (if any) */
void *zs_conschan_get, *zs_conschan_put;
/* Definition of the driver for autoconfig. */
static int zs_match_sbus(device_t, cfdata_t, void *);
static void zs_attach_sbus(device_t, device_t, void *);
if (sa->sa_nintr == 0) {
aprint_error(": no interrupt lines\n");
return;
}
/* Use the mapping setup by the Sun PROM if possible. */
if (zsaddr[zs_unit] == NULL) {
/* Only map registers once. */
if (sa->sa_npromvaddrs) {
/*
* We're converting from a 32-bit pointer to a 64-bit
* pointer. Since the 32-bit entity is negative, but
* the kernel is still mapped into the lower 4GB
* range, this needs to be zero-extended.
*
* XXXXX If we map the kernel and devices into the
* high 4GB range, this needs to be changed to
* sign-extend the address.
*/
sparc_promaddr_to_handle(sa->sa_bustag,
sa->sa_promvaddrs[0], &bh);
if (fa->fa_nreg < 1 && fa->fa_npromvaddrs < 1) {
printf(": no registers\n");
return;
}
if (fa->fa_nintr == 0) {
aprint_error(": no interrupt lines\n");
return;
}
/* Use the mapping setup by the Sun PROM if possible. */
if (zsaddr[zs_unit] == NULL) {
/* Only map registers once. */
if (fa->fa_npromvaddrs) {
/*
* We're converting from a 32-bit pointer to a 64-bit
* pointer. Since the 32-bit entity is negative, but
* the kernel is still mapped into the lower 4GB
* range, this needs to be zero-extended.
*
* XXXXX If we map the kernel and devices into the
* high 4GB range, this needs to be changed to
* sign-extend the address.
*/
sparc_promaddr_to_handle(fa->fa_bustag,
fa->fa_promvaddrs[0], &bh);
/*
* Attach a found zs.
*
* USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
* SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
*/
static void
zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
{
struct zsc_attach_args zsc_args;
struct zs_chanstate *cs;
int channel;
if (zsd == NULL) {
aprint_error(": configuration incomplete\n");
return;
}
/*
* Initialize software state for each channel.
*/
for (channel = 0; channel < 2; channel++) {
struct zschan *zc;
device_t child;
/* Make these correspond to cs_defcflag (-crtscts) */
cs->cs_rr0_dcd = ZSRR0_DCD;
cs->cs_rr0_cts = 0;
cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
cs->cs_wr5_rts = 0;
/*
* Clear the master interrupt enable.
* The INTENA is common to both channels,
* so just do it on the A channel.
*/
if (channel == 0) {
zs_write_reg(cs, 9, 0);
}
/*
* Look for a child driver for this channel.
* The child attach will setup the hardware.
*/
child = config_found(zsc->zsc_dev, (void *)&zsc_args,
zs_print, CFARGS_NONE);
if (child == NULL) {
/* No sub-driver. Just reset it. */
uint8_t reset = (channel == 0) ?
ZSWR9_A_RESET : ZSWR9_B_RESET;
zs_lock_chan(cs);
zs_write_reg(cs, 9, reset);
zs_unlock_chan(cs);
}
#if (NKBD > 0) || (NMS > 0)
/*
* If this was a zstty it has a keyboard
* property on it we need to attach the
* sunkbd and sunms line disciplines.
*/
if (child
&& (device_is_a(child, "zstty"))
&& (prom_getproplen(zsc->zsc_node, "keyboard") == 0)) {
struct kbd_ms_tty_attach_args kma;
struct tty *tp;
/*
* Now safe to install interrupt handlers. Note the arguments
* to the interrupt handlers aren't used. Note, we only do this
* once since both SCCs interrupt at the same level and vector.
*/
bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, zshard, zsc);
if (!(zsc->zsc_softintr = softint_establish(SOFTINT_SERIAL, zssoft, zsc)))
panic("zsattach: could not establish soft interrupt");
/*
* Set the master interrupt enable and interrupt vector.
* (common to both channels, do it on A)
*/
cs = zsc->zsc_cs[0];
zs_lock_chan(cs);
/* interrupt vector */
zs_write_reg(cs, 2, zs_init_reg[2]);
/* master interrupt control (enable) */
zs_write_reg(cs, 9, zs_init_reg[9]);
zs_unlock_chan(cs);
}
#if 0 /* not yet */
/* Make sure we call the tty layer with ttylock held. */
ttylock(tp);
#endif
(void)zsc_intr_soft(zsc);
#if 0 /* not yet */
ttyunlock(tp);
#endif
}
/*
* Compute the current baud rate given a ZS channel.
*/
static int
zs_get_speed(struct zs_chanstate *cs)
{
int tconst;
/*
* MD functions for setting the baud rate and control modes.
*/
int
zs_set_speed(struct zs_chanstate *cs, int bps /* bits per second */)
{
int tconst, real_bps;
if (bps == 0)
return (0);
#ifdef DIAGNOSTIC
if (cs->cs_brg_clk == 0)
panic("zs_set_speed");
#endif
tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
if (tconst < 0)
return (EINVAL);
/* Convert back to make sure we can do it. */
real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
/* XXX - Allow some tolerance here? */
if (real_bps != bps)
return (EINVAL);
/****************************************************************
* Console support functions (Sun specific!)
* Note: this code is allowed to know about the layout of
* the chip registers, and uses that to keep things simple.
* XXX - I think I like the mvme167 code better. -gwr
****************************************************************/
extern void Debugger(void);
/*
* Handle user request to enter kernel debugger.
*/
void
zs_abort(struct zs_chanstate *cs)
{
volatile struct zschan *zc = zs_conschan_get;
int rr0;
/* Wait for end of break to avoid PROM abort. */
/* XXX - Limit the wait? */
do {
rr0 = zc->zc_csr;
ZS_DELAY();
} while (rr0 & ZSRR0_BREAK);
#if defined(KGDB)
zskgdb(cs);
#elif defined(DDB)
if (!db_active)
Debugger();
else
/* Debugger is probably hozed */
callrom();
#else
printf("stopping on keyboard abort\n");
callrom();
#endif
}
/*
* Polled input char.
*/
int
zs_getc(void *arg)
{
volatile struct zschan *zc = arg;
int s, c, rr0;
s = splhigh();
/* Wait for a character to arrive. */
do {
rr0 = zc->zc_csr;
ZS_DELAY();
} while ((rr0 & ZSRR0_RX_READY) == 0);
c = zc->zc_data;
ZS_DELAY();
splx(s);
/*
* This is used by the kd driver to read scan codes,
* so don't translate '\r' ==> '\n' here...
*/
return (c);
}
/*
* Polled output char.
*/
void
zs_putc(void *arg, int c)
{
volatile struct zschan *zc = arg;
int s, rr0;
s = splhigh();
/* Wait for transmitter to become ready. */
do {
rr0 = zc->zc_csr;
ZS_DELAY();
} while ((rr0 & ZSRR0_TX_READY) == 0);
/*
* Send the next character.
* Now you'd think that this could be followed by a ZS_DELAY()
* just like all the other chip accesses, but it turns out that
* the `transmit-ready' interrupt isn't de-asserted until
* some period of time after the register write completes
* (more than a couple instructions). So to avoid stray
* interrupts we put in the 2us delay regardless of CPU model.
*/
zc->zc_data = c;
delay(2);
/*
* Polled console output putchar.
*/
static void
zscnputc(dev_t dev, int c)
{
zs_putc(zs_conschan_put, c);
}
int swallow_zsintrs;
static void
zscnpollc(dev_t dev, int on)
{
/*
* Need to tell zs driver to acknowledge all interrupts or we get
* annoying spurious interrupt messages. This is because mucking
* with spl() levels during polling does not prevent interrupts from
* being generated.
*/
if (on) swallow_zsintrs++;
else swallow_zsintrs--;
}
int
zs_console_flags(int promunit, int node, int channel)
{
int cookie, flags = 0;
char buf[255];
/*
* We'll just do the OBP grovelling down here since that's
* the only type of firmware we support.
*/
/* Default to channel 0 if there are no explicit prom args */
cookie = 0;
if (node == prom_instance_to_package(prom_stdin())) {
if (prom_getoption("input-device", buf, sizeof buf) == 0 &&
strcmp("ttyb", buf) == 0)
cookie = 1;
if (channel == cookie)
flags |= ZS_HWFLAG_CONSOLE_INPUT;
}
if (node == prom_instance_to_package(prom_stdout())) {
if (prom_getoption("output-device", buf, sizeof buf) == 0 &&
strcmp("ttyb", buf) == 0)
cookie = 1;
if (channel == cookie)
flags |= ZS_HWFLAG_CONSOLE_OUTPUT;
}
