/*
* Copyright (c) 1999, 2000, 2001 Matthew R. Green
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* UltraSPARC 5 and beyond ebus support.
*
* note that this driver is not complete:
* - interrupt establish is written and appears to work
* - bus map code is written and appears to work
* - ebus2 DMA code is completely unwritten, we just punt to
* the iommu.
*/
/*
* here are our bus space and bus DMA routines.
*/
static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, vaddr_t,
bus_space_handle_t *);
static void *ebus_intr_establish(bus_space_tag_t, int, int, int (*)(void *),
void *, void(*)(void));
int
ebus_match(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = aux;
char *name;
int node;
/* Only attach if there's a PROM node. */
node = PCITAG_NODE(pa->pa_tag);
if (node == -1)
return (0);
if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
return (0);
/* Match a real ebus */
name = prom_getpropstring(node, "name");
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS &&
strcmp(name, "ebus") == 0)
return (1);
/* Or a real ebus III */
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUSIII &&
strcmp(name, "ebus") == 0)
return (1);
/* Or a PCI-ISA bridge XXX I hope this is on-board. */
if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) {
return (1);
}
/* Or the Altera bridge on SPARCle */
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALTERA &&
PCI_PRODUCT(pa->pa_id) == 0 &&
strcmp(name, "ebus") == 0)
return (1);
return (0);
}
/*
* attach an ebus and all its children. this code is modeled
* after the sbus code which does similar things.
*/
void
ebus_attach(device_t parent, device_t self, void *aux)
{
struct ebus_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
struct ebus_attach_args eba;
struct ebus_interrupt_map_mask *immp;
int node, nmapmask, error;
char devinfo[256];
int ebus_setup_attach_args(struct ebus_softc *, int,
struct ebus_attach_args *);
int
ebus_setup_attach_args(struct ebus_softc *sc, int node,
struct ebus_attach_args *ea)
{
int n, rv;
if (ea->ea_name)
free((void *)ea->ea_name, M_DEVBUF);
if (ea->ea_reg)
free((void *)ea->ea_reg, M_DEVBUF);
if (ea->ea_intr)
free((void *)ea->ea_intr, M_DEVBUF);
if (ea->ea_vaddr)
free((void *)ea->ea_vaddr, M_DEVBUF);
}
int
ebus_print(void *aux, const char *p)
{
struct ebus_attach_args *ea = aux;
int i;
if (p)
aprint_normal("%s at %s", ea->ea_name, p);
for (i = 0; i < ea->ea_nreg; i++)
aprint_normal("%s %x-%x", i == 0 ? " addr" : ",",
ea->ea_reg[i].lo,
ea->ea_reg[i].lo + ea->ea_reg[i].size - 1);
for (i = 0; i < ea->ea_nintr; i++)
aprint_normal(" ipl %x", ea->ea_intr[i]);
return (UNCONF);
}
/*
* find the INO values for each interrupt and fill them in.
*
* for each "reg" property of this device, mask its hi and lo
* values with the "interrupt-map-mask"'s hi/lo values, and also
* mask the interrupt number with the interrupt mask. search the
* "interrupt-map" list for matching values of hi, lo and interrupt
* to give the INO for this interrupt.
*/
void
ebus_find_ino(struct ebus_softc *sc, struct ebus_attach_args *ea)
{
uint32_t hi, lo, intr;
int i, j, k;
if (sc->sc_nintmap == 0) {
for (i = 0; i < ea->ea_nintr; i++) {
OF_mapintr(ea->ea_node, &ea->ea_intr[i],
sizeof(ea->ea_intr[0]),
sizeof(ea->ea_intr[0]));
}
return;
}
DPRINTF(EDB_INTRMAP,
("; intr %x masked to %x", ea->ea_intr[j], intr));
for (i = 0; i < ea->ea_nreg; i++) {
hi = ea->ea_reg[i].hi & sc->sc_intmapmask.hi;
lo = ea->ea_reg[i].lo & sc->sc_intmapmask.lo;
DPRINTF(EDB_INTRMAP,
("; reg hi.lo %08x.%08x masked to %08x.%08x",
ea->ea_reg[i].hi, ea->ea_reg[i].lo, hi, lo));
for (k = 0; k < sc->sc_nintmap; k++) {
DPRINTF(EDB_INTRMAP,
("; checking hi.lo %08x.%08x intr %x",
sc->sc_intmap[k].hi, sc->sc_intmap[k].lo,
sc->sc_intmap[k].intr));
if (hi == sc->sc_intmap[k].hi &&
lo == sc->sc_intmap[k].lo &&
intr == sc->sc_intmap[k].intr) {
ea->ea_intr[j] =
sc->sc_intmap[k].cintr;
DPRINTF(EDB_INTRMAP,
("; FOUND IT! changing to %d\n",
sc->sc_intmap[k].cintr));
goto next_intr;
}
}
}
next_intr:;
}
}
/*
* bus space support. <sparc64/dev/psychoreg.h> has a discussion
* about PCI physical addresses, which also applies to ebus.
*/
bus_space_tag_t
ebus_alloc_bus_tag(struct ebus_softc *sc, int type)
{
bus_space_tag_t bt;
static int
_ebus_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags,
vaddr_t va, bus_space_handle_t *hp)
{
struct ebus_softc *sc = t->cookie;
paddr_t offset;
u_int bar;
int i, ss;
bar = BUS_ADDR_IOSPACE(ba);
offset = BUS_ADDR_PADDR(ba);
DPRINTF(EDB_BUSMAP,
("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n",
(int)bar, (uint32_t)offset, (uint32_t)size,
flags, (void *)va));
for (i = 0; i < sc->sc_nrange; i++) {
bus_addr_t pciaddr;
if (bar != sc->sc_range[i].child_hi)
continue;
if (offset < sc->sc_range[i].child_lo ||
(offset + size) >
(sc->sc_range[i].child_lo + sc->sc_range[i].size))
continue;
/* Isolate address space and find the right tag */
ss = (sc->sc_range[i].phys_hi>>24)&3;
switch (ss) {
case 1: /* I/O space */
t = sc->sc_iotag;
break;
case 2: /* Memory space */
t = sc->sc_memtag;
break;
case 0: /* Config space */
case 3: /* 64-bit Memory space */
default: /* WTF? */
/* We don't handle these */
panic("_ebus_bus_map: illegal space %x", ss);
break;
}
pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) |
sc->sc_range[i].phys_lo;
pciaddr += offset;
DPRINTF(EDB_BUSMAP,
("_ebus_bus_map: mapping to PCI addr %x\n",
(uint32_t)pciaddr));
/* pass it onto the psycho */
return (bus_space_map(t, pciaddr, size, flags, hp));
}
DPRINTF(EDB_BUSMAP, (": FAILED\n"));
return (EINVAL);
}
paddr_t
ebus_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot,
int flags)
{
bus_addr_t offset = paddr;
struct ebus_softc *sc = t->cookie;
int i;
for (i = 0; i < sc->sc_nrange; i++) {
bus_addr_t paddr1 =
((bus_addr_t)sc->sc_range[i].child_hi << 32) |
sc->sc_range[i].child_lo;
/*
* install an interrupt handler for a ebus device
*/
void *
ebus_intr_establish(bus_space_tag_t t, int pri, int level,
int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
{