/* $NetBSD: pq3ehci.c,v 1.12 2021/08/07 16:19:02 thorpej Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas of 3am Software Foundry.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This is relative to the start of the unreserved registers in USB controller
* block and not the full USB block which would be 0x1a8.
*/
#define PQ3_USBMODE 0xa8 /* USB mode */
#define USBMODE_CM __BITS(0,1) /* Controller Mode */
#define USBMODE_CM_IDLE __SHIFTIN(0,USBMODE_CM) /* Idle (both) */
#define USBMODE_CM_DEVICE __SHIFTIN(2,USBMODE_CM) /* Device Controller */
#define USBMODE_CM_HOST __SHIFTIN(3,USBMODE_CM) /* Host Controller */
#ifdef EHCI_DEBUG
#define DPRINTF(x) if (ehcidebug) printf x
extern int ehcidebug;
#else
#define DPRINTF(x)
#endif
/*
* We need to tell the USB interface to snoop all off RAM starting
* at 0. Since it can do it by powers of 2, get the highest RAM
* address and roughly round it to the next power of 2 and find
* the number of leading zero bits.
*/
cpu_write_4(cnl->cnl_addr + USB_SNOOP1,
SNOOP_2GB - __builtin_clz(curcpu()->ci_softc->cpu_highmem * 2 - 1));
cpu_write_4(cnl->cnl_addr + USB_CONTROL, USB_EN);
sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_USB, IST_ONCHIP,
ehci_intr, sc);
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "failed to establish interrupt %d\n",
cnl->cnl_intrs[0]);
goto fail;
}
aprint_normal_dev(self, "interrupting on irq %d\n",
cnl->cnl_intrs[0]);
/* offs is needed for EOWRITEx */
sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
/* Disable interrupts, so we don't get any spurious ones. */
DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs));
EOWRITE4(&sc->sc, EHCI_USBINTR, 0);