/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Steve C. Woodford
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Derived from the mainbus code in mvme68k/autoconf.c by Chuck Cranor.
*/
/*
* Attach children appropriate for this CPU.
*/
switch (machineid) {
#ifdef MVME147
case MVME_147:
devices = mainbusdevs_147;
_mainbus_dma_tag._dmamap_sync = _bus_dmamap_sync_030;
break;
#endif
#if defined(MVME162) || defined(MVME167) || defined(MVME172) || defined(MVME177)
case MVME_162:
case MVME_167:
case MVME_172:
case MVME_177:
devices = mainbusdevs_1x7;
_mainbus_dma_tag._dmamap_sync = _bus_dmamap_sync_0460;
break;
#endif
default:
panic("mainbus_attach: impossible CPU type");
}
for (i = 0; devices[i].md_name != NULL; ++i) {
/*
* On mvme162 and up, if the kernel config file had no vmetwo0
* device, we have to do some manual initialisation on the
* VMEChip2 to get local interrupts working (ABORT switch,
* hardware assisted soft interrupts).
*/
#if defined(MVME162) || defined(MVME172) || defined(MVME167) || defined(MVME177)
#if NVMETWO == 0
if (devices[i].md_offset == MAINBUS_VMETWO_OFFSET
#if defined(MVME147)
&& machineid != MVME_147
#endif
) {
(void)vmetwo_probe(&_mainbus_space_tag,
intiobase_phys + MAINBUS_VMETWO_OFFSET);
continue;
}
#endif
#endif
ma.ma_name = devices[i].md_name;
ma.ma_dmat = &_mainbus_dma_tag;
ma.ma_bust = &_mainbus_space_tag;
ma.ma_offset = devices[i].md_offset + intiobase_phys;
/*
* Attach the memory controllers on mvme162->mvme177.
* Note: These *must* be attached after the PCCChip2/MCChip.
* They must also be attached *after* the VMEchip2 has been
* initialised (either by the driver, or the vmetwo_probe()
* call above).
*/
#if defined(MVME162) || defined(MVME172) || defined(MVME167) || defined(MVME177)
#if defined(MVME147)
if (machineid != MVME_147)
#endif
{
ma.ma_name = "memc";
ma.ma_dmat = &_mainbus_dma_tag;
ma.ma_bust = &_mainbus_space_tag;
ma.ma_offset = MAINBUS_MEMC1_OFFSET + intiobase_phys;
(void)config_found(self, &ma, mainbus_print, CFARGS_NONE);
ma.ma_offset = MAINBUS_MEMC2_OFFSET + intiobase_phys;
(void)config_found(self, &ma, mainbus_print, CFARGS_NONE);
}
#endif