/*-
* Copyright (c) 1996, 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Gordon W. Ross and Wayne Knowles
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Zilog Z8530 Dual UART driver (machine-dependent part)
*
* Runs two serial lines per chip using slave drivers.
* Plain tty/async lines use the zs_async slave.
*/
/* Make life easier for the initialized arrays here. */
#if NZS < 2
#undef NZS
#define NZS 2
#endif
/*
* Some warts needed by z8530tty.c -
* The default parity REALLY needs to be the same as the PROM uses,
* or you can not see messages done with printf during boot-up...
*/
int zs_def_cflag = (CREAD | CS8 | HUPCL);
static int zshard(void *);
void zssoft(void *);
static int zs_get_speed(struct zs_chanstate *);
struct zschan *zs_get_chan_addr(int zs_unit, int channel);
int zs_getc(void *);
void zs_putc(void *, int);
/*
* Is the zs chip present?
*/
static int
zs_match(device_t parent, cfdata_t cf, void *aux)
{
struct confargs *ca = aux;
void *va;
if (strcmp(ca->ca_name, "zsc"))
return 0;
va = (void *)cf->cf_addr;
/* This returns -1 on a fault (bus error). */
if (badaddr(va, 1))
return 0;
return 1;
}
/*
* Attach a found zs.
*
* Match slave number to zs unit number, so that misconfiguration will
* not set up the keyboard as ttya, etc.
*/
static void
zs_attach(device_t parent, device_t self, void *aux)
{
struct zsc_softc *zsc = device_private(self);
struct confargs *ca = aux;
struct zsc_attach_args zsc_args;
struct zs_chanstate *cs;
struct zs_channel *ch;
int zs_unit, channel, s;
/* Make these correspond to cs_defcflag (-crtscts) */
cs->cs_rr0_dcd = ZSRR0_DCD;
cs->cs_rr0_cts = 0;
cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
cs->cs_wr5_rts = 0;
/*
* Clear the master interrupt enable.
* The INTENA is common to both channels,
* so just do it on the A channel.
*/
if (channel == 0) {
zs_write_reg(cs, 9, 0);
}
/*
* Look for a child driver for this channel.
* The child attach will setup the hardware.
*/
if (!config_found(self, (void *)&zsc_args, zs_print,
CFARGS_NONE)) {
/* No sub-driver. Just reset it. */
uint8_t reset = (channel == 0) ?
ZSWR9_A_RESET : ZSWR9_B_RESET;
s = splhigh();
zs_write_reg(cs, 9, reset);
splx(s);
}
}
/*
* Set the master interrupt enable and interrupt vector.
* (common to both channels, do it on A)
*/
cs = zsc->zsc_cs[0];
s = splhigh();
/* interrupt vector */
zs_write_reg(cs, 2, zs_init_reg[2]);
/* master interrupt control (enable) */
zs_write_reg(cs, 9, zs_init_reg[9]);
splx(s);
}
if (args->channel != -1)
aprint_normal(" channel %d", args->channel);
return UNCONF;
}
/*
* Our ZS chips all share a common, autovectored interrupt,
* so we have to look at all of them on each interrupt.
*/
static int
zshard(void *arg)
{
struct zsc_softc *zsc;
int unit, rval, softreq;
/*
* Similar scheme as for zshard (look at all of them)
*/
void
zssoft(void *arg)
{
struct zsc_softc *zsc;
int s, unit;
/* This is not the only ISR on this IPL. */
if (zssoftpending == 0)
return;
/*
* The soft intr. bit will be set by zshard only if
* the variable zssoftpending is zero. The order of
* these next two statements prevents our clearing
* the soft intr bit just after zshard has set it.
*/
/*isr_soft_clear(ZSSOFT_PRI);*/
zssoftpending = 0;
/* Make sure we call the tty layer at spltty. */
s = spltty();
for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
zsc = device_lookup_private(&zsc_cd, unit);
if (zsc == NULL)
continue;
(void)zsc_intr_soft(zsc);
}
splx(s);
return;
}
/*
* Compute the current baud rate given a ZS channel.
*/
static int
zs_get_speed(struct zs_chanstate *cs)
{
int tconst;
/*
* MD functions for setting the baud rate and control modes.
*/
int
zs_set_speed(struct zs_chanstate *cs, int bps)
{
int tconst;
#if 0
int real_bps;
#endif
#if 0
while (!(zs_read_csr(cs) & ZSRR0_TX_READY))
{/*nop*/}
#endif
/* Wait for transmit buffer to empty */
if (bps == 0) {
return (0);
}
#ifdef DIAGNOSTIC
if (cs->cs_brg_clk == 0)
panic("zs_set_speed");
#endif
tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
if (tconst < 0)
return (EINVAL);
#if 0
/* Convert back to make sure we can do it. */
real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
/* XXX - Allow some tolerance here? */
if (real_bps != bps)
return (EINVAL);
#endif
/*********************************************************/
/* Polled character I/O functions for console and KGDB */
/*********************************************************/
