/*
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Wayne Knowles
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/* ISA bus maps 1 word for every byte, therefore stride = 2 */
mipsco_bus_space_set_aligned_stride(bst, 2);
/*
* ISA bus will do an automatic byte swap, but when accessing
* memory using bus_space_stream functions we need to byte swap
* to reverse the one performed in hardware
*/
bst->bs_bswap = 1;
const struct evcnt *
isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
{
/* XXX for now, no evcnt parent reported */
return NULL;
}
void *
isa_intr_establish(isa_chipset_tag_t ic, int intr, int type, int level, int (*ih_fun)(void*), void *ih_arg)
/* type: XXX not yet */
/* level: XXX not yet */
{
struct mipsco_intrhand *ih;
int
isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
{
return 0;
}
int
isa_intr(void *arg)
{
struct mipsco_isa_chipset *ic = (struct mipsco_isa_chipset *)arg;
struct mipsco_intrhand *ih;
int rv, handled;
ic->ic_intrcnt.ev_count++;
handled = 0;
LIST_FOREACH(ih, &ic->intr_q, ih_q) {
/*
* The handler returns one of three values:
* 0: This interrupt wasn't for me.
* 1: This interrupt was for me.
* -1: This interrupt might have been for me, but I can't say
* for sure.
*/
rv = (*ih->ih_fun)(ih->ih_arg);
handled |= (rv != 0);
}
/* Clear ISA interrupt latch */
bus_space_write_4(ic->ic_bst, ic->ic_bsh, 0, 0);