/*
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)pmap.h 8.1 (Berkeley) 6/10/93
*/
/*
* Copyright (c) 1987 Carnegie-Mellon University
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)pmap.h 8.1 (Berkeley) 6/10/93
*/
/*
* Root Pointer attributes for Supervisor and User modes.
*
* Supervisor:
* - No index limit (Lower limit == 0)
* - Points to Short format descriptor table.
* - Shared Globally
*
* User:
* - No index limit (Lower limit == 0)
* - Points to Short format descriptor table.
*/
#define MMU51_SRP_BITS (DTE51_LOWER | DTE51_SG | DT51_SHORT)
#define MMU51_CRP_BITS (DTE51_LOWER | DT51_SHORT)
/*
* MMU specific segment values
*
* We are using following segment layout in m68k pmap_motorola.c:
* 68020/030 4KB/page: l1,l2,page == 10,10,12 (%tc = 0x82c0aa00)
* 68020/030 8KB/page: l1,l2,page == 8,11,13 (%tc = 0x82d08b00)
* 68040/060 4KB/page: l1,l2,l3,page == 7,7,6,12 (%tc = 0x8000)
* 68040/060 8KB/page: l1,l2,l3,page == 7,7,5,13 (%tc = 0xc000)
*
* 68020/030 l2 size is chosen per NPTEPG, a number of page table entries
* per page, to use one whole page for PTEs per one segment table entry,
* and maybe also because 68020 HP MMU machines use similar structures.
*
* 68040/060 layout is defined by hardware design and not configurable,
* as defined in <m68k/pte_motorola.h>.
*
* Even on 68040/060, we still appropriate 2-level ste-pte pmap structures
* for 68020/030 (derived from 4.4BSD/hp300) to handle 040's 3-level MMU.
* TIA_SIZE and TIB_SIZE are used to represent such pmap structures and
* they are also referred on 040/060.
*
* NBSEG and SEGOFSET are used to check l2 STE of the specified VA,
* so they have different values between 020/030 and 040/060.
*/
/* 8KB / 4KB */
#define TIB_SHIFT (PGSHIFT - 2) /* 11 / 10 */
#define TIB_SIZE (1U << TIB_SHIFT) /* 2048 / 1024 */
#define TIA_SHIFT (32 - TIB_SHIFT - PGSHIFT) /* 8 / 10 */
#define TIA_SIZE (1U << TIA_SHIFT) /* 256 / 1024 */
/*
* On the 040, we keep track of which level 2 blocks are already in use
* with the pm_stfree mask. Bits are arranged from LSB (block 0) to MSB
* (block 31). For convenience, the level 1 table is considered to be
* block 0.
*
* MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed
* for the kernel and users.
* 16 or 8 implies only the initial "segment table" page is used,
* i.e. it means PAGE_SIZE / (SG4_LEV1SIZE * sizeof(st_entry_t)).
* WARNING: don't change MAXUL2SIZE unless you can allocate
* physically contiguous pages for the ST in pmap_motorola.c!
*/
#define MAXKL2SIZE 32
#if PAGE_SIZE == 8192 /* NBPG / (SG4_LEV1SIZE * sizeof(st_entry_t)) */
#define MAXUL2SIZE 16
#else
#define MAXUL2SIZE 8
#endif
#define l2tobm(n) (1U << (n))
#define bmtol2(n) (ffs(n) - 1)
/*
* For each struct vm_page, there is a list of all currently valid virtual
* mappings of that page. An entry is a pv_entry, the list is pv_table.
*/
struct pv_entry {
struct pv_entry *pv_next; /* next pv_entry */
struct pmap *pv_pmap; /* pmap where mapping lies */
vaddr_t pv_va; /* virtual address for mapping */
st_entry_t *pv_ptste; /* non-zero if VA maps a PT page */
struct pmap *pv_ptpmap; /* if pv_ptste, pmap for PT page */
};
extern struct pv_header *pv_table; /* array of entries, one per page */
