/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Christopher G. Demetriou
* for the NetBSD Project.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef BUS_SPACE_DEBUG
/*
* Macros for sanity-checking the aligned-ness of pointers passed to
* bus space ops. These are not strictly necessary on the x86, but
* could lead to performance improvements, and help catch problems
* with drivers that would creep up on other architectures.
*/
#define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
((((u_long)(p)) & (sizeof(t)-1)) == 0)
/*
* Derived from x86 implementation, ia64 has both i/o and mem spaces
* These values are for bus space tag.
*/
#define IA64_BUS_SPACE_IO 0 /* space is i/o space */
#define IA64_BUS_SPACE_MEM 1 /* space is mem space */
#define __BUS_SPACE_HAS_STREAM_METHODS 1
/*
* Bus address and size types
*/
typedef u_long bus_addr_t;
typedef u_long bus_size_t;
/*
* uintN_t bus_space_read_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset);
*
* Read a 1, 2, 4, or 8 byte quantity from bus space
* described by tag/handle/offset.
*/
/*
* void bus_space_read_multi_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* uintN_t *addr, size_t count);
*
* Read `count' 1, 2, 4, or 8 byte quantities from bus space
* described by tag/handle/offset and copy into buffer provided.
*/
/*
* void bus_space_read_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* uintN_t *addr, size_t count);
*
* Read `count' 1, 2, 4, or 8 byte quantities from bus space
* described by tag/handle and starting at `offset' and copy into
* buffer provided.
*/
/*
* void bus_space_write_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* uintN_t value);
*
* Write the 1, 2, 4, or 8 byte value `value' to bus space
* described by tag/handle/offset.
*/
#define bus_space_write_1(t, h, o, v) \
do { \
if ((t) == IA64_BUS_SPACE_IO) \
outb((h) + (o), (v)); \
else \
((void)(*(volatile uint8_t *)((h) + (o)) = (v))); \
} while (/* CONSTCOND */ 0)
/*
* void bus_space_write_multi_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* const uintN_t *addr, size_t count);
*
* Write `count' 1, 2, 4, or 8 byte quantities from the buffer
* provided to bus space described by tag/handle/offset.
*/
/*
* void bus_space_write_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* const uintN_t *addr, size_t count);
*
* Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
* to bus space described by tag/handle starting at `offset'.
*/
/*
* void bus_space_set_multi_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
* size_t count);
*
* Write the 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle/offset `count' times.
*/
#define bus_space_set_multi_1(t, h, o, v, c) \
ia64_bus_space_set_multi_1((t), (h), (o), (v), (c))
#define bus_space_set_multi_2(t, h, o, v, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
ia64_bus_space_set_multi_2((t), (h), (o), (v), (c)); \
} while (/* CONSTCOND */ 0)
#define bus_space_set_multi_4(t, h, o, v, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
ia64_bus_space_set_multi_4((t), (h), (o), (v), (c)); \
} while (/* CONSTCOND */ 0)
#define bus_space_set_multi_8(t, h, o, v, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint64_t, "bus addr"); \
ia64_bus_space_set_multi_8((t), (h), (o), (v), (c)); \
} while (/* CONSTCOND */ 0)
static __inline void
ia64_bus_space_set_multi_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
while (c--)
outb(addr, v);
else
while (c--)
*(volatile uint8_t *)(addr) = v;
}
static __inline void
ia64_bus_space_set_multi_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
while (c--)
outw(addr, v);
else
while (c--)
*(volatile uint16_t *)(addr) = v;
}
static __inline void
ia64_bus_space_set_multi_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
while (c--)
outl(addr, v);
else
while (c--)
*(volatile uint32_t *)(addr) = v;
}
static __inline void
ia64_bus_space_set_multi_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
printf("%s: can't write 8bytes to I/O space\n", __FUNCTION__);
else
while (c--)
*(volatile uint64_t *)(addr) = v;
}
/*
* void bus_space_set_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
* size_t count);
*
* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle starting at `offset'.
*/
#define bus_space_set_region_1(t, h, o, v, c) \
ia64_bus_space_set_region_1((t), (h), (o), (v), (c))
#define bus_space_set_region_2(t, h, o, v, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
ia64_bus_space_set_region_2((t), (h), (o), (v), (c)); \
} while (/* CONSTCOND */ 0)
#define bus_space_set_region_4(t, h, o, v, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
ia64_bus_space_set_region_4((t), (h), (o), (v), (c)); \
} while (/* CONSTCOND */ 0)
#define bus_space_set_region_8(t, h, o, v, c) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint64_t, "bus addr"); \
ia64_bus_space_set_region_8((t), (h), (o), (v), (c)); \
} while (/* CONSTCOND */ 0)
static __inline void
ia64_bus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
for (; c != 0; c--, addr++)
outb(addr, v);
else
for (; c != 0; c--, addr++)
*(volatile uint8_t *)(addr) = v;
}
static __inline void
ia64_bus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
for (; c != 0; c--, addr += 2)
outw(addr, v);
else
for (; c != 0; c--, addr += 2)
*(volatile uint16_t *)(addr) = v;
}
static __inline void
ia64_bus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
for (; c != 0; c--, addr += 4)
outl(addr, v);
else
for (; c != 0; c--, addr += 4)
*(volatile uint32_t *)(addr) = v;
}
static __inline void
ia64_bus_space_set_region_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t v, size_t c)
{
bus_addr_t addr = h + o;
if (t == IA64_BUS_SPACE_IO)
printf("%s: can't write 8bytes to I/O space\n", __FUNCTION__);
else
for (; c != 0; c--, addr += 8)
*(volatile uint32_t *)(addr) = v;
}
/*
* void bus_space_copy_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh1, bus_size_t off1,
* bus_space_handle_t bsh2, bus_size_t off2,
* size_t count);
*
* Copy `count' 1, 2, 4, or 8 byte values from bus space starting
* at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
*/
if (t == IA64_BUS_SPACE_IO) {
printf("%s: can't write 8bytes to I/O space\n", __FUNCTION__);
} else {
if (addr1 >= addr2) {
/* src after dest: copy forward */
for (; c != 0; c--, addr1 += 8, addr2 += 8)
*(volatile uint64_t *)(addr2) =
*(volatile uint64_t *)(addr1);
} else {
/* dest after src: copy backwards */
for (addr1 += 8 * (c - 1), addr2 += 8 * (c - 1);
c != 0; c--, addr1 -= 8, addr2 -= 8)
*(volatile uint64_t *)(addr2) =
*(volatile uint64_t *)(addr1);
}
}
}
/*
* Bus read/write barrier methods.
*
* void bus_space_barrier(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* bus_size_t len, int flags);
*
* Note: the x86 does not currently require barriers, but we must
* provide the flags to MI code.
*/
#define bus_space_barrier(t, h, o, l, f) \
ia64_bus_space_barrier((t), (h), (o), (l), (f))
/*
* bus_dma_segment_t
*
* Describes a single contiguous DMA transaction. Values
* are suitable for programming into DMA registers.
*/
struct ia64_bus_dma_segment {
bus_addr_t ds_addr; /* DMA address */
bus_size_t ds_len; /* length of transfer */
};
typedef struct ia64_bus_dma_segment bus_dma_segment_t;
/*
* bus_dma_tag_t
*
* A machine-dependent opaque type describing the implementation of
* DMA for a given bus.
*/
struct ia64_bus_dma_tag {
/*
* The `bounce threshold' is checked while we are loading
* the DMA map. If the physical address of the segment
* exceeds the threshold, an error will be returned. The
* caller can then take whatever action is necessary to
* bounce the transfer. If this value is 0, it will be
* ignored.
*/
bus_addr_t _bounce_thresh;
bus_addr_t _bounce_alloc_lo;
bus_addr_t _bounce_alloc_hi;
int (*_may_bounce)(bus_dma_tag_t, bus_dmamap_t, int, int *);
/*
* bus_dmamap_t
*
* Describes a DMA mapping.
*/
struct ia64_bus_dmamap {
/*
* PRIVATE MEMBERS: not for use by machine-independent code.
*/
bus_size_t _dm_size; /* largest DMA transfer mappable */
int _dm_segcnt; /* number of segs this map can map */
bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
bus_size_t _dm_boundary; /* don't cross this */
bus_addr_t _dm_bounce_thresh; /* bounce threshold; see tag */
int _dm_flags; /* misc. flags */
void *_dm_cookie; /* cookie for bus-specific functions */
/*
* PUBLIC MEMBERS: these are used by machine-independent code.
*/
bus_size_t dm_maxsegsz; /* largest possible segment */
bus_size_t dm_mapsize; /* size of the mapping */
int dm_nsegs; /* # valid segments in mapping */
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
};
