/*
* Copyright (c) 2004, 2005 Valeriy E. Ushakov
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* LCD contrast in 680 is controlled by pins 6..3 of HD64461 GPIO
* port B. 6th pin is the least significant bit, 3rd pin is the most
* significant. The bits are inverted: 0 = .1111...; 1 = .0111...;
* etc. Larger values mean "blacker".
*
* The contrast value is programmed by setting bits in the data
* register to all ones, and changing the mode of the pins in the
* control register, setting logical "ones" to GPIO output mode (1),
* and switching "zeroes" to input mode (3).
*/
#define HD64461_GPBDR_J680_CONTRAST_BITS 0x78 /* set */
#define HD64461_GPBCR_J680_CONTRAST_MASK 0xc03f
/*
* LCD contrast in 620lx is controlled by pins 7,6,3,4,5 of HD64461
* GPIO port B (in the order from the least significant to the most
* significant). The bits are inverted: 0 = 11111...; 5 = 01110...;
* etc. Larger values mean "whiter".
*
* The contrast value is programmed by setting bits in the data
* register to all zeroes, and changing the mode of the pins in the
* control register, setting logical "ones" to GPIO output mode (1),
* and switching "zeroes" to input mode (3).
*/
#define HD64461_GPBDR_J620LX_CONTRAST_BITS 0xf8 /* clear */
#define HD64461_GPBCR_J620LX_CONTRAST_MASK 0x003f
static int
j6x0lcd_match(device_t parent, cfdata_t cf, void *aux)
{
/*
* XXX: platid_mask_MACH_HP_LX also matches 360LX. It's not
* confirmed whether touch panel in 360LX is connected this
* way. We may need to regroup platid masks.
*/
if (!platid_match(&platid, &platid_mask_MACH_HP_JORNADA_6XX)
&& !platid_match(&platid, &platid_mask_MACH_HP_LX))
return (0);
if (strcmp(cf->cf_name, "j6x0lcd") != 0)
return (0);
/*
* Contrast and power are controlled by HD64461 GPIO port B.
*/
bcr = hd64461_reg_read_2(HD64461_GPBCR_REG16);
bdr = hd64461_reg_read_2(HD64461_GPBDR_REG16);
/*
* Make sure LCD is turned on.
*/
bcr &= HD64461_GPBCR_J6X0_LCD_OFF_MASK;
bcr |= HD64461_GPBCR_J6X0_LCD_OFF_BITS; /* output mode */
bdr &= ~HD64461_GPBDR_J6X0_LCD_OFF;
/*
* 620LX and 680 have different contrast control.
*/
if (platid_match(&platid, &platid_mask_MACH_HP_JORNADA_6XX)) {
bdr |= HD64461_GPBDR_J680_CONTRAST_BITS;
/* XXX: TODO: don't rely on CONFIG_HOOK_POWERCONTROL_LCD */
if (!pmf_device_register(self, NULL, NULL))
aprint_error_dev(self, "unable to establish power handler\n");
}
/*
* Get raw contrast value programmed in GPIO port B control register.
* Used only at attach time to get initial contrast.
*/
static int
j6x0lcd_contrast_raw(uint16_t bcr, int width, const uint8_t *pin)
{
int contrast;
int bit;
contrast = 0;
for (bit = 0; bit < width; ++bit) {
unsigned int c;
c = (bcr >> (pin[bit] << 1)) & 0x3;
if (c == 1) /* pin in output mode? */
contrast |= (1 << bit);
}
return contrast;
}
/*
* Set contrast by programming GPIO port B control register.
* Data register has been initialized at attach time.
*/
static void
j6x0lcd_contrast_set(struct j6x0lcd_softc *sc, int contrast)
{
uint16_t bcr;
static int
j6x0lcd_power(void *ctx, int type, long id, void *msg)
{
int on;
uint16_t r;
if (type != CONFIG_HOOK_POWERCONTROL
|| id != CONFIG_HOOK_POWERCONTROL_LCD)
return (EINVAL);
on = (int)msg;
r = hd64461_reg_read_2(HD64461_GPBDR_REG16);
if (on)
r &= ~HD64461_GPBDR_J6X0_LCD_OFF;
else
r |= HD64461_GPBDR_J6X0_LCD_OFF;
hd64461_reg_write_2(HD64461_GPBDR_REG16, r);