/*
* Copyright (c) 1995 Leo Weppelman.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Set the various driver options
*/
#define NREQ 18 /* Size of issue queue */
#define AUTO_SENSE 1 /* Automatically issue a request-sense */
#define DRNAME ncrscsi /* used in various prints */
#undef DBG_SEL /* Show the selection process */
#undef DBG_REQ /* Show enqueued/ready requests */
#undef DBG_ERR_RET /* Show requests with != 0 return code */
#undef DBG_NOWRITE /* Do not allow writes to the targets */
#undef DBG_PIO /* Show the polled-I/O process */
#undef DBG_INF /* Show information transfer process */
#define DBG_NOSTATIC /* No static functions, all in DDB trace*/
#define DBG_PID 15 /* Keep track of driver */
#define REAL_DMA /* Use DMA if sensible */
#if defined(FALCON_SCSI)
#define REAL_DMA_POLL 1 /* 1: Poll for end of DMA-transfer */
#else
#define REAL_DMA_POLL 0 /* 1: Poll for end of DMA-transfer */
#endif
#undef USE_PDMA /* Use special pdma-transfer function */
#define MIN_PHYS 65536 /*BARF!!!!*/
/*
* Include more driver definitions
*/
#include <atari/dev/ncr5380var.h>
/*
* The atari specific driver options
*/
#undef NO_TTRAM_DMA /* Do not use DMA to TT-ram. This */
/* fails on older atari's */
#define ENABLE_NCR5380(sc) cur_softc = sc;
/*
* Functions that do nothing on the atari
*/
#define pdma_ready() 0
#if defined(TT_SCSI)
void ncr5380_drq_intr(int);
/*
* Define all the things we need of the DMA-controller
*/
#define SCSI_DMA ((struct scsi_dma *)AD_SCSI_DMA)
#define SCSI_5380 ((struct scsi_5380 *)AD_NCR5380)
struct scsi_dma {
volatile uint8_t s_dma_ptr[8]; /* use only the odd bytes */
volatile uint8_t s_dma_cnt[8]; /* use only the odd bytes */
volatile uint8_t s_dma_res[4]; /* data residue register */
volatile uint8_t s_dma_gap; /* not used */
volatile uint8_t s_dma_ctrl; /* control register */
volatile uint8_t s_dma_gap2; /* not used */
volatile uint8_t s_hdma_ctrl; /* Hades control register */
};
/*
* Defines for TT-DMA control register
*/
#define SD_BUSERR 0x80 /* 1 = transfer caused bus error*/
#define SD_ZERO 0x40 /* 1 = byte counter is zero */
#define SD_ENABLE 0x02 /* 1 = Enable DMA */
#define SD_OUT 0x01 /* Direction: memory to SCSI */
#define SD_IN 0x00 /* Direction: SCSI to memory */
/*
* Defines for Hades-DMA control register
*/
#define SDH_BUSERR 0x02 /* 1 = Bus error */
#define SDH_EOP 0x01 /* 1 = Signal EOP on 5380 */
#define SDH_ZERO 0x40 /* 1 = Byte counter is zero */
/*
* Define the 5380 register set
*/
struct scsi_5380 {
volatile uint8_t scsi_5380[16]; /* use only the odd bytes */
};
#endif /* TT_SCSI */
/**********************************************
* Variables present for both TT and Falcon. *
**********************************************/
/*
* Softc of currently active controller (a bit of fake; we only have one)
*/
static struct ncr_softc *cur_softc;
#if defined(TT_SCSI) && !defined(FALCON_SCSI)
/*
* We can be more efficient for some functions when only TT_SCSI is selected
*/
#define GET_5380_REG(rnum) SCSI_5380->scsi_5380[(rnum << 1) | 1]
#define SET_5380_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val)
/*
* Define these too, so we can use them locally...
*/
#define GET_TT_REG(rnum) SCSI_5380->scsi_5380[(rnum << 1) | 1]
#define SET_TT_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val)
#ifdef NO_TTRAM_DMA
static int
tt_wrong_dma_range(SC_REQ *reqp, struct dma_chain *dm)
{
if (intr_establish(2, AUTO_VEC, 0,
(hw_ifun_t)ncr5380_drq_intr, NULL) == NULL)
panic("scsi_tt_init: Can't establish drq-interrupt");
} else
panic("scsi_tt_init: should not come here");
/*
* LWP: DMA transfers to TT-ram causes data to be garbled
* without notice on some TT-mainboard revisions.
* If programs generate mysterious Segmentations faults,
* try enabling NO_TTRAM_DMA.
*/
#ifdef NO_TTRAM_DMA
printf(": DMA to TT-RAM is disabled!");
#endif
}
static int
tt_poll_edma(SC_REQ *reqp)
{
uint8_t dmstat, dmastat;
int timeout = 9000; /* XXX */
/*
* We wait here until the DMA has finished. This can be
* achieved by checking the following conditions:
* - 5380:
* - End of DMA flag is set
* - We lost BSY (error!!)
* - A phase mismatch has occurred (partial transfer)
* - DMA-controller:
* - A bus error occurred (Kernel error!!)
* - All bytes are transferred
* If one of the terminating conditions was met, we call
* 'dma_ready' to check errors and perform the bookkeeping.
*/
scsi_tt_idisable();
for (;;) {
delay(20);
if (--timeout <= 0) {
ncr_tprint(reqp, "timeout on polled transfer\n");
reqp->xs->error = XS_TIMEOUT;
scsi_tt_ienable();
return 0;
}
dmstat = GET_TT_REG(NCR5380_DMSTAT);
if (dmastat & SD_BUSERR) {
/*
* The DMA-controller seems to access 8 bytes beyond
* its limits on output. Therefore check also the byte
* count. If it's zero, ignore the bus error.
*/
if (leftover != 0) {
ncr_tprint(reqp,
"SCSI-DMA buserror - accessing 0x%x\n", byte_p);
reqp->xs->error = XS_DRIVER_STUFFUP;
}
}
/*
* We handle the following special condition below:
* -- The device disconnects in the middle of a write operation --
* In this case, the 5380 has already pre-fetched the next byte from
* the DMA-controller before the phase mismatch occurs. Therefore,
* leftover is 1 too low.
* This does not always happen! Therefore, we only do this when
* leftover is odd. This assumes that DMA transfers are _even_! This
* is normally the case on disks and types but might not always be.
* XXX: Check if ACK is consistently high on these occasions LWP
*/
if ((leftover & 1) &&
(dmstat & SC_PHS_MTCH) == 0 && PH_OUT(reqp->phase))
leftover++;
/*
* Check if there are some 'restbytes' left in the DMA-controller.
*/
if ((machineid & ATARI_TT) &&
((u_long)byte_p & 3) && PH_IN(reqp->phase)) {
uint8_t *p;
volatile uint8_t *q;
/*
* Block SCSI interrupts while emulating DMA. They come
* at a higher priority.
*/
single_inst_bclr_b(MFP2->mf_imra, IA_SCSI);
/*
* Setup for a possible bus error caused by SCSI controller
* switching out of DATA-IN/OUT before we're done with the
* current transfer.
*/
nofault = (int *)&faultbuf;
if (setjmp((label_t *) nofault)) {
u_long cnt, tmp;
PID("drq berr");
nofault = (int *)0;
/*
* Determine number of bytes transferred
*/
cnt = (u_long)dma_ptr - get_scsi_dma(SCSI_DMA->s_dma_ptr);
if (tmp > cnt) {
/*
* Still more to transfer
*/
if (!poll)
single_inst_bset_b(MFP2->mf_imra,
IA_SCSI);
return;
}
/*
* Signal EOP to 5380
*/
SCSI_DMA->s_hdma_ctrl |= SDH_EOP;
} else {
nofault = (int *)&faultbuf;
/*
* Try to figure out if the byte-count was
* zero because there was no (more) data or
* because the dma_ptr is bogus.
*/
if (setjmp((label_t *) nofault)) {
/*
* Set the bus-error bit
*/
SCSI_DMA->s_hdma_ctrl |= SDH_BUSERR;
}
__asm volatile ("tstb %0@(0)": : "a" (dma_ptr));
nofault = (int *)0;
}
/*
* Schedule an interrupt
*/
if (!poll && (SCSI_DMA->s_dma_ctrl & SD_ENABLE))
add_sicallback((si_farg)ncr_dma_intr,
(void *)cur_softc, 0);
/*
* Keep pushing bytes until we're done or a bus-error
* signals that the SCSI controller is not ready.
* NOTE: I tried some optimalizations in these loops,
* but they had no effect on transfer speed.
*/
if (write) {
while (count--) {
*data_p = *dma_ptr++;
}
} else {
while (count--) {
*dma_ptr++ = *data_p;
}
}
/*
* OK. No bus error occurred above. Clear the nofault flag
* so we no longer short-circuit bus errors.
*/
nofault = (int *)0;
/*
* Schedule an interrupt
*/
if (!poll && (SCSI_DMA->s_dma_ctrl & SD_ENABLE))
add_sicallback((si_farg)ncr_dma_intr, (void *)cur_softc, 0);
/*
* Update the DMA 'registers' to reflect that all bytes
* have been transferred and tell this to the 5380 too.
*/
set_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)dma_ptr);
set_scsi_dma(SCSI_DMA->s_dma_cnt, 0);
SCSI_DMA->s_hdma_ctrl |= SDH_EOP;
PID("end drq");
if (!poll)
single_inst_bset_b(MFP2->mf_imra, IA_SCSI);
}
int falcon_can_access_5380(void);
void scsi_falcon_clr_ipend(void);
void scsi_falcon_idisable(void);
void scsi_falcon_ienable(void);
int scsi_falcon_ipending(void);
int falcon_claimed_dma(void);
void falcon_reconsider_dma(void);
if (connected && (connected->dr_flag & DRIVER_IN_DMA)) {
/*
* XXX: When DMA is running, we are only allowed to
* check the 5380 when DMA _might_ be finished.
*/
if (MFP->mf_gpip & IO_DINT)
/* XXX: Actually: we're not allowed to check */
return 0;
/* LWP: 28-06, must be a DMA interrupt! should the
* ST-DMA unit be taken out of DMA mode?????
*/
DMA->dma_mode = 0x90;
static int
falcon_wrong_dma_range(SC_REQ *reqp, struct dma_chain *dm)
{
/*
* Do not allow chains yet! See also comment with
* falcon_poll_edma() !!!
*/
if (((dm - reqp->dm_chain) > 0) || (dm->dm_addr & 0xff000000)) {
reqp->dr_flag |= DRIVER_BOUNCING;
return 1;
}
/*
* Never allow DMA to happen on a Falcon when the transfer
* size is no multiple of 512. This is the transfer unit of the
* ST DMA-controller.
*/
if (dm->dm_count & 511)
return 1;
return 0;
}
static int falcon_lock = 0;
static inline int
falcon_claimed_dma(void)
{
if (falcon_lock != DMA_LOCK_GRANT) {
if (falcon_lock == DMA_LOCK_REQ) {
/*
* DMA access is being claimed.
*/
return 0;
}
if (st_dmagrab((dma_farg)ncr_ctrl_intr, (dma_farg)run_main,
cur_softc, &falcon_lock, 1, NULL) == 0)
return 0;
}
return 1;
}
static inline void
falcon_reconsider_dma(void)
{
if (falcon_lock && (connected == NULL) && (discon_q == NULL)) {
/*
* No need to keep DMA locked by us as we are not currently
* connected and no disconnected jobs are pending.
*/
rem_sicallback((si_farg)ncr_ctrl_intr);
st_dmafree(cur_softc, &falcon_lock);
}
if (!falcon_lock && (issue_q != NULL)) {
/*
* We must (re)claim DMA access as there are jobs
* waiting in the issue queue.
*/
st_dmagrab((dma_farg)ncr_ctrl_intr, (dma_farg)run_main,
cur_softc, &falcon_lock, 0, NULL);
}
}
/*
* XXX: We should probably clear the fifo before putting the
* 5380 into DMA-mode.
*/
if (PH_IN(phase)) {
set_falcon_5380_reg(NCR5380_ICOM, 0);
set_falcon_5380_reg(NCR5380_MODE, mode);
set_falcon_5380_reg(NCR5380_IRCV, 0);
fal1_dma(0, nsects, reqp);
} else {
set_falcon_5380_reg(NCR5380_MODE, mode);
set_falcon_5380_reg(NCR5380_ICOM, SC_ADTB);
set_falcon_5380_reg(NCR5380_DMSTAT, 0);
fal1_dma(1, nsects, reqp);
}
}
static int
falcon_poll_edma(SC_REQ *reqp)
{
int timeout = 9000; /* XXX */
/*
* Because of the Falcon hardware, it is impossible to reach
* the 5380 while doing DMA-transfers. So we have to rely on
* the interrupt line to determine if DMA-has finished. the
* DMA-controller itself will never fire an interrupt. This means
* that 'broken-up' DMA transfers are not (yet) possible on the
* Falcon.
*/
for (;;) {
delay(20);
if (--timeout <= 0) {
ncr_tprint(reqp, "Timeout on polled transfer\n");
reqp->xs->error = XS_TIMEOUT;
return 0;
}
if ((MFP->mf_gpip & IO_DINT) == 0)
break;
}
return 1;
}
static int
falcon_get_dma_result(SC_REQ *reqp, u_long *bytes_left)
{
int rv = 0;
int st_dmastat;
u_long bytes_done;
/*
* Select sector counter register first (See Atari docu.)
*/
DMA->dma_mode = 0x90;
if (!(st_dmastat = DMA->dma_stat) & 0x01) {
/*
* Misc. DMA-error according to Atari...
*/
ncr_tprint(reqp, "Unknown ST-SCSI error near 0x%x\n",
st_dmaaddr_get());
reqp->xs->error = XS_DRIVER_STUFFUP;
rv = 1;
}
/*
* Because we NEVER start DMA on the Falcon when the data size
* is not a multiple of 512 bytes, we can safely round down the
* byte count on writes. We need to because in case of a disconnect,
* the DMA has already prefetched the next couple of bytes.
* On read, these byte counts are an error. They are logged and
* should be handled by the mi-part of the driver.
* NOTE: We formerly did this by using the 'byte-count-zero' bit
* of the DMA controller, but this didn't seem to work???
* [lwp 29/06/96]
*/
bytes_done = st_dmaaddr_get() - reqp->dm_cur->dm_addr;
if (bytes_done & 511) {
if (PH_IN(reqp->phase)) {
ncr_tprint(reqp, "Byte count on read not a multiple "
"of 512 (%ld)\n", bytes_done);
}
bytes_done &= ~511;
}
if ((*bytes_left = reqp->dm_cur->dm_count - bytes_done) == 0)
rv = 1;
return rv;
}
void scsi_ienable(void);
void scsi_idisable(void);
void scsi_clr_ipend(void);
int scsi_ipending(void);
void scsi_dma_setup(SC_REQ *, u_int, uint8_t);
int wrong_dma_range(SC_REQ *, struct dma_chain *);
int poll_edma(SC_REQ *);
int get_dma_result(SC_REQ *, u_long *);
int can_access_5380(void);
/*
* Register access will be done through the following 2 function pointers.
*/
static uint8_t (*get_5380_reg)(u_short);
static void (*set_5380_reg)(u_short, u_short);
/*
* Locking stuff. All turns into NOP's on the TT.
*/
#define fair_to_keep_dma() \
((machineid & ATARI_FALCON) ? !st_dmawanted() : 1)
#define claimed_dma() \
((machineid & ATARI_FALCON) ? falcon_claimed_dma() : 1)
#define reconsider_dma() \
do { \
if (machineid & ATARI_FALCON) \
falcon_reconsider_dma(); \
} while (/* CONSTCOND */ 0)
#endif /* defined(TT_SCSI) && defined(FALCON_SCSI) */
/**********************************************
* Functions present for both TT and Falcon. *
**********************************************/
/*
* Our autoconfig matching function
*/
static int
machine_match(device_t parent, cfdata_t cf, void *aux, struct cfdriver *cd)
{
static int we_matched = 0; /* Only one unit */
if (strcmp(aux, cd->cd_name) || we_matched)
return 0;
we_matched = 1;
return 1;
}
/*
* Bounce buffer (de)allocation. Those buffers are gotten from the ST-mem
* pool. Allocation here is both contiguous and in the lower 16Mb of
* the address space. Thus being DMA-able for all controllers.
*/
static uint8_t *
alloc_bounceb(u_long len)
{
void *tmp;