/*-
* Copyright (c) 2000, 2020 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* DMA support for the AMD 751 (``Irongate'') core logic chipset.
*
* The AMD 751 is really unlike all of the other Alpha PCI core logic
* chipsets. Instead, it looks like a normal PC chipset (not surprising,
* since it is used for Athlon processors).
*
* Because of this, it lacks all of the SGMAP hardware normally present
* on an Alpha system, and there are no DMA windows. Instead, a memory
* bus address is a PCI DMA address, and ISA DMA above 16M has to be
* bounced (this is not unlike the Jensen, actually).
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
void
irongate_page_physload(unsigned long const start_pfn,
unsigned long const end_pfn)
{
/*
* The Irongate does not have SGMAP DMA. For this reason, we
* need to protect the first 16MB of RAM from random allocations
* in order to give ISA DMA a snowball's chance of working.
*/
alpha_page_physload_sheltered(start_pfn, end_pfn,
0, alpha_btop(0x1000000));
}
/*
* Return the bus dma tag to be used for the specified bus type.
* INTERNAL USE ONLY!
*/
static bus_dma_tag_t
irongate_dma_get_tag(bus_dma_tag_t t, alpha_bus_t bustype)
{
struct irongate_config *icp = t->_cookie;
switch (bustype) {
case ALPHA_BUS_PCI:
case ALPHA_BUS_EISA:
/*
* Busses capable of 32-bit DMA get the PCI DMA tag.
*/
return (&icp->ic_dmat_pci);
case ALPHA_BUS_ISA:
/*
* Lame 24-bit busses have to bounce.
*/
return (&icp->ic_dmat_isa);
default:
panic("irongate_dma_get_tag: shouldn't be here, really...");
}
}