/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Reserve the bottom 512K of the I/O space for ISA devices.
* According to the PMON sources, this is a work-around for
* a bug in the ISA bridge.
*/
#define PCI_IO_START 0x00080000
#define PCI_IO_END 0x00ffffff
#define PCI_MEM_START 0x01000000
#define PCI_MEM_END 0x07ffffff
#define PCI_IDE_DEV 2
#define PCI_IDE_FUNC 1
#define PCI_CHIPSET &p5064_configuration.ac_pc
#endif /* ALGOR_P5064 */
#if defined(PCI_NETBSD_ENABLE_IDE)
/*
* Perhaps PMON has not enabled the IDE controller. Easy to
* fix -- just set the ENABLE bits for each channel in the
* IDETIM register. Just clear all the bits for the channel
* except for the ENABLE bits -- the `pciide' driver will
* properly configure it later.
*/
pcitag_t idetag = pci_make_tag(PCI_CHIPSET, 0, PCI_IDE_DEV,
PCI_IDE_FUNC);
pcireg_t idetim = 0;
if (PCI_NETBSD_ENABLE_IDE & 0x01)
idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 0);
if (PCI_NETBSD_ENABLE_IDE & 0x02)
idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 1);
pci_conf_write(PCI_CHIPSET, idetag, PIIX_IDETIM, idetim);
#endif
#endif /* NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) */
#if defined(ALGOR_P4032)
st = &p4032_configuration.ac_lociot;
#elif defined(ALGOR_P5064)
st = NULL;
#elif defined(ALGOR_P6032)
st = NULL;
#endif