/* Print National Semiconductor 32000 instructions.
Copyright (C) 1986-2024 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
/* Number of elements in the opcode table. */
#define NOPCODES (sizeof ns32k_opcodes / sizeof ns32k_opcodes[0])
#define NEXT_IS_ADDR '|'
struct ns32k_option
{
char *pattern; /* The option itself. */
unsigned long value; /* Binary value of the option. */
unsigned long match; /* These bits must match. */
};
for (; (options != 0) && optionP->pattern; optionP++)
{
if ((options & optionP->match) == optionP->value)
{
/* We found a match, update result and options. */
strcat (result, optionP->pattern);
options &= ~optionP->value;
if (options != 0) /* More options to come. */
strcat (result, ",");
}
}
#if 1 /* A version that should work on ns32k f's&d's on any machine. */
static int
invalid_float (bfd_byte *p, int len)
{
int val;
if (len == 4)
val = (bit_extract_simple (p, 23, 8)/*exponent*/ == 0xff
|| (bit_extract_simple (p, 23, 8)/*exponent*/ == 0
&& bit_extract_simple (p, 0, 23)/*mantisa*/ != 0));
else if (len == 8)
val = (bit_extract_simple (p, 52, 11)/*exponent*/ == 0x7ff
|| (bit_extract_simple (p, 52, 11)/*exponent*/ == 0
&& (bit_extract_simple (p, 0, 32)/*low mantisa*/ != 0
|| bit_extract_simple (p, 32, 20)/*high mantisa*/ != 0)));
else
val = 1;
return (val);
}
#else
/* Assumes the bytes have been swapped to local order. */
typedef union
{
double d;
float f;
struct { unsigned m:23, e:8, :1;} sf;
struct { unsigned lm; unsigned m:20, e:11, :1;} sd;
} float_type_u;
static int
invalid_float (float_type_u *p, int len)
{
int val;
if (len == sizeof (float))
val = (p->sf.e == 0xff
|| (p->sf.e == 0 && p->sf.m != 0));
else if (len == sizeof (double))
val = (p->sd.e == 0x7ff
|| (p->sd.e == 0 && (p->sd.m != 0 || p->sd.lm != 0)));
else
val = 1;
return val;
}
#endif
/* Print an instruction operand of category given by d. IOFFSET is
the bit position below which small (<1 byte) parts of the operand can
be found (usually in the basic instruction, but for indexed
addressing it can be in the index byte). AOFFSETP is a pointer to the
bit position of the addressing extension. BUFFER contains the
instruction. ADDR is where BUFFER was read from. Put the disassembled
version of the operand in RESULT. INDEX_OFFSET is the bit position
of the index byte (it contains -1 if this operand is not a
general operand using scaled indexed addressing mode). */
static int
print_insn_arg (int d,
int ioffset,
int *aoffsetp,
bfd_byte *buffer,
bfd_vma addr,
char *result,
int index_offset)
{
union
{
float f;
double d;
int i[2];
} value;
int Ivalue;
int addr_mode;
int disp1, disp2;
int size;
switch (d)
{
case 'f':
/* A "gen" operand but 5 bits from the end of instruction. */
ioffset -= 5;
/* Fall through. */
case 'Z':
case 'F':
case 'L':
case 'I':
case 'B':
case 'W':
case 'D':
case 'A':
addr_mode = bit_extract (buffer, ioffset - 5, 5);
ioffset -= 5;
switch (addr_mode)
{
case 0x0: case 0x1: case 0x2: case 0x3:
case 0x4: case 0x5: case 0x6: case 0x7:
/* Register mode R0 -- R7. */
switch (d)
{
case 'F':
case 'L':
case 'Z':
sprintf (result, "f%d", addr_mode);
break;
default:
sprintf (result, "r%d", addr_mode);
}
break;
case 0x8: case 0x9: case 0xa: case 0xb:
case 0xc: case 0xd: case 0xe: case 0xf:
/* Register relative disp(R0 -- R7). */
disp1 = get_displacement (buffer, aoffsetp);
sprintf (result, "%d(r%d)", disp1, addr_mode & 7);
break;
case 0x10:
case 0x11:
case 0x12:
/* Memory relative disp2(disp1(FP, SP, SB)). */
disp1 = get_displacement (buffer, aoffsetp);
disp2 = get_displacement (buffer, aoffsetp);
sprintf (result, "%d(%d(%s))", disp2, disp1,
addr_mode == 0x10 ? "fp" : addr_mode == 0x11 ? "sp" : "sb");
break;
case 0x13:
/* Reserved. */
sprintf (result, "reserved");
break;
case 0x14:
/* Immediate. */
switch (d)
{
default:
/* I and Z are output operands and can`t be immediate
A is an address and we can`t have the address of
an immediate either. We don't know how much to increase
aoffsetp by since whatever generated this is broken
anyway! */
sprintf (result, _("$<undefined>"));
break;
case 'B':
Ivalue = bit_extract (buffer, *aoffsetp, 8);
Ivalue = sign_extend (Ivalue, 8);
*aoffsetp += 8;
sprintf (result, "$%d", Ivalue);
break;
case 'W':
Ivalue = bit_extract (buffer, *aoffsetp, 16);
flip_bytes ((char *) & Ivalue, 2);
*aoffsetp += 16;
Ivalue = sign_extend (Ivalue, 16);
sprintf (result, "$%d", Ivalue);
break;
case 'D':
Ivalue = bit_extract (buffer, *aoffsetp, 32);
flip_bytes ((char *) & Ivalue, 4);
*aoffsetp += 32;
sprintf (result, "$%d", Ivalue);
break;
case 'F':
bit_copy (buffer, *aoffsetp, 32, (char *) &value.f);
flip_bytes ((char *) &value.f, 4);
*aoffsetp += 32;
if (INVALID_FLOAT (&value.f, 4))
sprintf (result, "<<invalid float 0x%.8x>>", value.i[0]);
else /* Assume host has ieee float. */
sprintf (result, "$%g", value.f);
break;
case 'L':
bit_copy (buffer, *aoffsetp, 64, (char *) &value.d);
flip_bytes ((char *) &value.d, 8);
*aoffsetp += 64;
if (INVALID_FLOAT (&value.d, 8))
sprintf (result, "<<invalid double 0x%.8x%.8x>>",
value.i[1], value.i[0]);
else /* Assume host has ieee float. */
sprintf (result, "$%g", value.d);
break;
}
break;
case 0x15:
/* Absolute @disp. */
disp1 = get_displacement (buffer, aoffsetp);
sprintf (result, "@|%d|", disp1);
break;
case 0x16:
/* External EXT(disp1) + disp2 (Mod table stuff). */
disp1 = get_displacement (buffer, aoffsetp);
disp2 = get_displacement (buffer, aoffsetp);
sprintf (result, "EXT(%d) + %d", disp1, disp2);
break;
case 0x17:
/* Top of stack tos. */
sprintf (result, "tos");
break;
case 0x18:
/* Memory space disp(FP). */
disp1 = get_displacement (buffer, aoffsetp);
sprintf (result, "%d(fp)", disp1);
break;
case 0x19:
/* Memory space disp(SP). */
disp1 = get_displacement (buffer, aoffsetp);
sprintf (result, "%d(sp)", disp1);
break;
case 0x1a:
/* Memory space disp(SB). */
disp1 = get_displacement (buffer, aoffsetp);
sprintf (result, "%d(sb)", disp1);
break;
case 0x1b:
/* Memory space disp(PC). */
disp1 = get_displacement (buffer, aoffsetp);
*result++ = NEXT_IS_ADDR;
sprintf (result, "%" PRIx64, (uint64_t) (addr + disp1));
result += strlen (result);
*result++ = NEXT_IS_ADDR;
*result = '\0';
break;
case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f:
{
int bit_index;
static const char *ind = "bwdq";
char *off;
/* Scaled index basemode[R0 -- R7:B,W,D,Q]. */
bit_index = bit_extract (buffer, index_offset - 8, 3);
print_insn_arg (d, index_offset, aoffsetp, buffer, addr,
result, 0);
off = result + strlen (result);
sprintf (off, "[r%d:%c]", bit_index, ind[addr_mode & 3]);
}
break;
}
break;
case 'H':
case 'q':
Ivalue = bit_extract (buffer, ioffset-4, 4);
Ivalue = sign_extend (Ivalue, 4);
sprintf (result, "%d", Ivalue);
ioffset -= 4;
break;
case 'r':
Ivalue = bit_extract (buffer, ioffset-3, 3);
sprintf (result, "r%d", Ivalue&7);
ioffset -= 3;
break;
case 'd':
sprintf (result, "%d", get_displacement (buffer, aoffsetp));
break;
case 'b':
Ivalue = get_displacement (buffer, aoffsetp);
/* Warning!! HACK ALERT!
Operand type 'b' is only used by the cmp{b,w,d} and
movm{b,w,d} instructions; we need to know whether
it's a `b' or `w' or `d' instruction; and for both
cmpm and movm it's stored at the same place so we
just grab two bits of the opcode and look at it... */
size = bit_extract(buffer, ioffset-6, 2);
if (size == 0) /* 00 => b. */
size = 1;
else if (size == 1) /* 01 => w. */
size = 2;
else
size = 4; /* 11 => d. */
/* Look for 8bit opcodes first. Other wise, fetching two bytes could take
us over the end of accessible data unnecessarilly. */
FETCH_DATA (info, buffer + 1);
for (i = 0; i < NOPCODES; i++)
if (ns32k_opcodes[i].opcode_id_size <= 8
&& ((buffer[0]
& (((unsigned long) 1 << ns32k_opcodes[i].opcode_id_size) - 1))
== ns32k_opcodes[i].opcode_seed))
break;
if (i == NOPCODES)
{
/* Maybe it is 9 to 16 bits big. */
FETCH_DATA (info, buffer + 2);
first_word = read_memory_integer(buffer, 2);
for (i = 0; i < NOPCODES; i++)
if ((first_word
& (((unsigned long) 1 << ns32k_opcodes[i].opcode_id_size) - 1))
== ns32k_opcodes[i].opcode_seed)
break;
/* Handle undefined instructions. */
if (i == NOPCODES)
{
(*dis_info->fprintf_func)(dis_info->stream, "0%o", buffer[0]);
return 1;
}
}
ioffset = ns32k_opcodes[i].opcode_size;
aoffset = ns32k_opcodes[i].opcode_size;
d = ns32k_opcodes[i].operands;
if (*d)
{
/* Offset in bits of the first thing beyond each index byte.
Element 0 is for operand A and element 1 is for operand B. */
int index_offset[2];
/* 0 for operand A, 1 for operand B, greater for other args. */
int whicharg = 0;
/* First we have to find and keep track of the index bytes,
if we are using scaled indexed addressing mode, since the index
bytes occur right after the basic instruction, not as part
of the addressing extension. */
index_offset[0] = -1;
index_offset[1] = -1;
if (Is_gen (d[1]))
{
int bitoff = d[1] == 'f' ? 10 : 5;
int addr_mode = bit_extract (buffer, ioffset - bitoff, 5);