@c Copyright (C) 2001-2024 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node PDP-11-Dependent
@chapter PDP-11 Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter PDP-11 Dependent Features
@end ifclear
@cindex PDP-11 support
@menu
* PDP-11-Options:: Options
* PDP-11-Pseudos:: Assembler Directives
* PDP-11-Syntax:: DEC Syntax versus BSD Syntax
* PDP-11-Mnemonics:: Instruction Naming
* PDP-11-Synthetic:: Synthetic Instructions
@end menu
@node PDP-11-Options
@section Options
@cindex options for PDP-11
The PDP-11 version of @code{@value{AS}} has a rich set of machine
dependent options.
The default is to generate position-independent code.
@end table
@subsection Instruction Set Extension Options
These options enables or disables the use of extensions over the base
line instruction set as introduced by the first PDP-11 CPU: the KA11.
Most options come in two variants: a @code{-m}@var{extension} that
enables @var{extension}, and a @code{-mno-}@var{extension} that disables
@var{extension}.
The default is to enable all extensions.
@table @code
@cindex -mall
@cindex -mall-extensions
@item -mall | -mall-extensions
Enable all instruction set extensions.
@cindex -mno-extensions
@item -mno-extensions
Disable all instruction set extensions.
@cindex -mcis
@cindex -mno-cis
@item -mcis | -mno-cis
Enable (or disable) the use of the commercial instruction set, which
consists of these instructions: @code{ADDNI}, @code{ADDN}, @code{ADDPI},
@code{ADDP}, @code{ASHNI}, @code{ASHN}, @code{ASHPI}, @code{ASHP},
@code{CMPCI}, @code{CMPC}, @code{CMPNI}, @code{CMPN}, @code{CMPPI},
@code{CMPP}, @code{CVTLNI}, @code{CVTLN}, @code{CVTLPI}, @code{CVTLP},
@code{CVTNLI}, @code{CVTNL}, @code{CVTNPI}, @code{CVTNP}, @code{CVTPLI},
@code{CVTPL}, @code{CVTPNI}, @code{CVTPN}, @code{DIVPI}, @code{DIVP},
@code{L2DR}, @code{L3DR}, @code{LOCCI}, @code{LOCC}, @code{MATCI},
@code{MATC}, @code{MOVCI}, @code{MOVC}, @code{MOVRCI}, @code{MOVRC},
@code{MOVTCI}, @code{MOVTC}, @code{MULPI}, @code{MULP}, @code{SCANCI},
@code{SCANC}, @code{SKPCI}, @code{SKPC}, @code{SPANCI}, @code{SPANC},
@code{SUBNI}, @code{SUBN}, @code{SUBPI}, and @code{SUBP}.
@cindex -mcsm
@cindex -mno-csm
@item -mcsm | -mno-csm
Enable (or disable) the use of the @code{CSM} instruction.
@cindex -meis
@cindex -mno-eis
@item -meis | -mno-eis
Enable (or disable) the use of the extended instruction set, which
consists of these instructions: @code{ASHC}, @code{ASH}, @code{DIV},
@code{MARK}, @code{MUL}, @code{RTT}, @code{SOB} @code{SXT}, and
@code{XOR}.
@cindex -mfis
@cindex -mno-fis
@cindex -mkev11
@cindex -mkev11
@cindex -mno-kev11
@item -mfis | -mkev11
@itemx -mno-fis | -mno-kev11
Enable (or disable) the use of the KEV11 floating-point instructions:
@code{FADD}, @code{FDIV}, @code{FMUL}, and @code{FSUB}.
@cindex -mlimited-eis
@cindex -mno-limited-eis
@item -mlimited-eis | -mno-limited-eis
Enable (or disable) the use of the limited extended instruction set:
@code{MARK}, @code{RTT}, @code{SOB}, @code{SXT}, and @code{XOR}.
The -mno-limited-eis options also implies -mno-eis.
@cindex -mmfpt
@cindex -mno-mfpt
@item -mmfpt | -mno-mfpt
Enable (or disable) the use of the @code{MFPT} instruction.
@cindex -mmutiproc
@cindex -mno-mutiproc
@item -mmultiproc | -mno-multiproc
Enable (or disable) the use of multiprocessor instructions: @code{TSTSET} and
@code{WRTLCK}.
@cindex -mmxps
@cindex -mno-mxps
@item -mmxps | -mno-mxps
Enable (or disable) the use of the @code{MFPS} and @code{MTPS} instructions.
@cindex -mspl
@cindex -mno-spl
@item -mspl | -mno-spl
Enable (or disable) the use of the @code{SPL} instruction.
@cindex -mmicrocode
@cindex -mno-microcode
Enable (or disable) the use of the microcode instructions: @code{LDUB},
@code{MED}, and @code{XFC}.
@end table
@subsection CPU Model Options
These options enable the instruction set extensions supported by a
particular CPU, and disables all other extensions.
@table @code
@cindex -mka11
@item -mka11
KA11 CPU. Base line instruction set only.
@cindex -mkb11
@item -mkb11
KB11 CPU. Enable extended instruction set and @code{SPL}.
The PDP-11 version of @code{@value{AS}} has a few machine
dependent assembler directives.
@table @code
@item .bss
Switch to the @code{bss} section.
@item .even
Align the location counter to an even number.
@end table
@node PDP-11-Syntax
@section PDP-11 Assembly Language Syntax
@cindex PDP-11 syntax
@cindex DEC syntax
@cindex BSD syntax
@code{@value{AS}} supports both DEC syntax and BSD syntax. The only
difference is that in DEC syntax, a @code{#} character is used to denote
an immediate constants, while in BSD syntax the character for this
purpose is @code{$}.
@cindex PDP-11 general-purpose register syntax
general-purpose registers are named @code{r0} through @code{r7}.
Mnemonic alternatives for @code{r6} and @code{r7} are @code{sp} and
@code{pc}, respectively.
@cindex PDP-11 floating-point register syntax
Floating-point registers are named @code{ac0} through @code{ac3}, or
alternatively @code{fr0} through @code{fr3}.
@cindex PDP-11 comments
Comments are started with a @code{#} or a @code{/} character, and extend
to the end of the line. (FIXME: clash with immediates?)
@cindex PDP-11 line separator
Multiple statements on the same line can be separated by the @samp{;} character.
