diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/Kconfig parisc-2.5/drivers/scsi/Kconfig
--- linus-2.5/drivers/scsi/Kconfig Thu Oct 31 10:27:51 2002
+++ parisc-2.5/drivers/scsi/Kconfig Sat Nov 2 07:54:37 2002
@@ -993,6 +993,16 @@ config SCSI_SYM53C8XX_2
Please read <file:drivers/scsi/sym53c8xx_2/Documentation.txt> for more
information.
+config SCSI_ZALON
+ tristate "Zalon SCSI support"
+ depends on GSC && SCSI
+ help
+ The Zalon is a GSC/HSC bus interface chip that sits between the
+ PA-RISC processor and the NCR 53c720 SCSI controller on C100,
+ C110, J200, J210 and some D, K & R-class machines. It's also
+ used on the add-in Bluefish, Barracuda & Shrike SCSI cards.
+ Say Y here if you have one of these machines or cards.
+
config SCSI_SYM53C8XX_DMA_ADDRESSING_MODE
int "DMA addressing mode"
depends on SCSI_SYM53C8XX_2
@@ -1097,7 +1107,7 @@ config SCSI_SYM53C8XX
config SCSI_NCR53C8XX_DEFAULT_TAGS
int "default tagged command queue depth"
- depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX)
+ depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX || SCSI_ZALON)
default "8"
---help---
"Tagged command queuing" is a feature of SCSI-2 which improves
@@ -1123,7 +1133,7 @@ config SCSI_NCR53C8XX_DEFAULT_TAGS
config SCSI_NCR53C8XX_MAX_TAGS
int "maximum number of queued commands"
- depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX)
+ depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX || SCSI_ZALON)
default "32"
---help---
This option allows you to specify the maximum number of commands
@@ -1140,7 +1150,7 @@ config SCSI_NCR53C8XX_MAX_TAGS
config SCSI_NCR53C8XX_SYNC
int "synchronous transfers frequency in MHz"
- depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX)
+ depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX || SCSI_ZALON)
default "20"
---help---
The SCSI Parallel Interface-2 Standard defines 5 classes of transfer
@@ -1174,7 +1184,7 @@ config SCSI_NCR53C8XX_SYNC
config SCSI_NCR53C8XX_PROFILE
bool "enable profiling"
- depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX)
+ depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX || SCSI_ZALON)
help
This option allows you to enable profiling information gathering.
These statistics are not very accurate due to the low frequency
@@ -1185,7 +1195,7 @@ config SCSI_NCR53C8XX_PROFILE
config SCSI_NCR53C8XX_IOMAPPED
bool "use normal IO"
- depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX)
+ depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX) && !SCSI_ZALON
help
If you say Y here, the driver will use normal IO, as opposed to
memory mapped IO. Memory mapped IO has less latency than normal IO
@@ -1210,7 +1220,7 @@ config SCSI_NCR53C8XX_PQS_PDS
config SCSI_NCR53C8XX_NO_DISCONNECT
bool "not allow targets to disconnect"
- depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX) && SCSI_NCR53C8XX_DEFAULT_TAGS=0
+ depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX || SCSI_ZALON) && SCSI_NCR53C8XX_DEFAULT_TAGS=0
help
This option is only provided for safety if you suspect some SCSI
device of yours to not support properly the target-disconnect
@@ -1220,7 +1230,7 @@ config SCSI_NCR53C8XX_NO_DISCONNECT
config SCSI_NCR53C8XX_SYMBIOS_COMPAT
bool "assume boards are SYMBIOS compatible (EXPERIMENTAL)"
- depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX) && EXPERIMENTAL
+ depends on PCI && SCSI_SYM53C8XX_2!=y && (SCSI_NCR53C8XX || SCSI_SYM53C8XX || SCSI_ZALON) && EXPERIMENTAL
---help---
This option allows you to enable some features depending on GPIO
wiring. These General Purpose Input/Output pins can be used for
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/Makefile parisc-2.5/drivers/scsi/Makefile
--- linus-2.5/drivers/scsi/Makefile Tue Nov 5 11:18:40 2002
+++ parisc-2.5/drivers/scsi/Makefile Tue Nov 5 11:15:05 2002
@@ -83,6 +83,7 @@ obj-$(CONFIG_SCSI_NCR53C7xx) += 53c7,8xx
obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/
obj-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
obj-$(CONFIG_SCSI_NCR53C8XX) += ncr53c8xx.o
+obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o
obj-$(CONFIG_SCSI_EATA_DMA) += eata_dma.o
obj-$(CONFIG_SCSI_EATA_PIO) += eata_pio.o
obj-$(CONFIG_SCSI_7000FASST) += wd7000.o
@@ -130,6 +131,7 @@ sd_mod-objs := sd.o
sr_mod-objs := sr.o sr_ioctl.o sr_vendor.o
initio-objs := ini9100u.o i91uscsi.o
a100u2w-objs := inia100.o i60uscsi.o
+zalon7xx-objs := zalon.o ncr53c8xx.o
cpqfc-objs := cpqfcTSinit.o cpqfcTScontrol.o cpqfcTSi2c.o \
cpqfcTSworker.o cpqfcTStrigger.o
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/lasi700.c parisc-2.5/drivers/scsi/lasi700.c
--- linus-2.5/drivers/scsi/lasi700.c Thu Jul 18 09:53:26 2002
+++ parisc-2.5/drivers/scsi/lasi700.c Thu Oct 31 18:06:42 2002
@@ -51,7 +51,6 @@
#include <asm/irq.h>
#include <asm/hardware.h>
#include <asm/delay.h>
-#include <asm/gsc.h>
#include <linux/module.h>
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/ncr53c8xx.c parisc-2.5/drivers/scsi/ncr53c8xx.c
--- linus-2.5/drivers/scsi/ncr53c8xx.c Thu Oct 31 17:35:43 2002
+++ parisc-2.5/drivers/scsi/ncr53c8xx.c Sat Nov 2 07:54:38 2002
@@ -82,6 +82,7 @@
** Etc...
**
** Supported NCR/SYMBIOS chips:
+** 53C720 (Wide, Fast SCSI-2, HP Zalon)
** 53C810 (8 bits, Fast SCSI-2, no rom BIOS)
** 53C815 (8 bits, Fast SCSI-2, on board rom BIOS)
** 53C820 (Wide, Fast SCSI-2, no rom BIOS)
@@ -178,6 +179,23 @@
typedef u32 u_int32;
typedef u64 u_int64;
typedef u_long vm_offset_t;
+
+#ifdef __hppa__
+/*
+ * Yuck. Current plan is to use ncr58c8xx.c for non-pci big endian
+ * chips, and sym53c8xx.c for pci little endian chips. Define this
+ * here so it gets seen by sym53c8xx_defs.h, pulled in via ncr53c8xx.h.
+ */
+#define SCSI_NCR_BIG_ENDIAN
+/* INTFLY interrupts don't always seem to get serviced atm..... */
+#define SIMULATED_INTFLY
+#endif
+
+#if defined(CONFIG_SCSI_ZALON) || defined(CONFIG_SCSI_ZALON_MODULE)
+#define ENABLE_SCSI_ZALON
+#include "zalon.h"
+#endif
+
#include "ncr53c8xx.h"
/*
@@ -379,6 +397,8 @@ static Scsi_Host_Template *the_template
static void ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs);
static void ncr53c8xx_timeout(unsigned long np);
+static int ncr53c8xx_proc_info(char *buffer, char **start, off_t offset,
+ int length, int hostno, int func);
#define initverbose (driver_setup.verbose)
#define bootverbose (np->verbose)
@@ -450,7 +470,8 @@ static u_char Tekram_sync[16] __initdata
#define SIR_RESEL_BAD_I_T_L (15)
#define SIR_RESEL_BAD_I_T_L_Q (16)
#define SIR_DONE_OVERFLOW (17)
-#define SIR_MAX (17)
+#define SIR_INTFLY (18)
+#define SIR_MAX (18)
/*==========================================================
**
@@ -622,6 +643,15 @@ struct tcb {
** negotiation of wide and synch transfer and device quirks.
**----------------------------------------------------------------
*/
+#ifdef SCSI_NCR_BIG_ENDIAN
+/*0*/ u_short period;
+/*2*/ u_char sval;
+/*3*/ u_char minsync;
+/*0*/ u_char wval;
+/*1*/ u_char widedone;
+/*2*/ u_char quirks;
+/*3*/ u_char maxoffs;
+#else
/*0*/ u_char minsync;
/*1*/ u_char sval;
/*2*/ u_short period;
@@ -629,6 +659,7 @@ struct tcb {
/*1*/ u_char quirks;
/*2*/ u_char widedone;
/*3*/ u_char wval;
+#endif
#ifdef SCSI_NCR_INTEGRITY_CHECKING
u_char ic_min_sync;
@@ -839,10 +870,17 @@ struct head {
/*
** Last four bytes (host)
*/
+#ifdef SCSI_NCR_BIG_ENDIAN
+#define actualquirks phys.header.status[3]
+#define host_status phys.header.status[2]
+#define scsi_status phys.header.status[1]
+#define parity_status phys.header.status[0]
+#else
#define actualquirks phys.header.status[0]
#define host_status phys.header.status[1]
#define scsi_status phys.header.status[2]
#define parity_status phys.header.status[3]
+#endif
/*
** First four bytes (script)
@@ -1026,8 +1064,8 @@ struct ncb {
** be used for probing adapter implementation differences.
**----------------------------------------------------------------
*/
- u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
- sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4;
+ u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3,
+ sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4;
/*----------------------------------------------------------------
** Actual initial value of IO register bits used by the
@@ -1035,8 +1073,8 @@ struct ncb {
** features that are to be enabled.
**----------------------------------------------------------------
*/
- u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
- rv_ctest5, rv_stest2;
+ u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3,
+ rv_ctest4, rv_ctest5, rv_stest2;
/*----------------------------------------------------------------
** Targets management.
@@ -1158,7 +1196,7 @@ struct ncb {
*/
struct ccb *ccb; /* Global CCB */
struct usrcmd user; /* Command from user */
- u_char release_stage; /* Synchronisation stage on release */
+ volatile u_char release_stage; /* Synchronisation stage on release */
#ifdef SCSI_NCR_INTEGRITY_CHECKING
/*----------------------------------------------------------------
@@ -1197,6 +1235,23 @@ struct ncb {
*/
/*
+** For HP Zalon/53c720 systems, the Zalon interface
+** between CPU and 53c720 does prefetches, which causes
+** problems with self modifying scripts. The problem
+** is overcome by calling a dummy subroutine after each
+** modification, to force a refetch of the script on
+** return from the subroutine.
+*/
+
+#ifdef ENABLE_SCSI_ZALON
+#define PREFETCH_FLUSH_CNT 2
+#define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma),
+#else
+#define PREFETCH_FLUSH_CNT 0
+#define PREFETCH_FLUSH
+#endif
+
+/*
** Script fragments which are loaded into the on-chip RAM
** of 825A, 875 and 895 chips.
*/
@@ -1204,7 +1259,7 @@ struct script {
ncrcmd start [ 5];
ncrcmd startpos [ 1];
ncrcmd select [ 6];
- ncrcmd select2 [ 9];
+ ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT];
ncrcmd loadpos [ 4];
ncrcmd send_ident [ 9];
ncrcmd prepare [ 6];
@@ -1220,7 +1275,7 @@ struct script {
ncrcmd setmsg [ 7];
ncrcmd cleanup [ 6];
ncrcmd complete [ 9];
- ncrcmd cleanup_ok [ 8];
+ ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT];
ncrcmd cleanup0 [ 1];
#ifndef SCSI_NCR_CCB_DONE_SUPPORT
ncrcmd signal [ 12];
@@ -1238,11 +1293,11 @@ struct script {
ncrcmd idle [ 2];
ncrcmd reselect [ 8];
ncrcmd reselected [ 8];
- ncrcmd resel_dsa [ 6];
+ ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT];
ncrcmd loadpos1 [ 4];
ncrcmd resel_lun [ 6];
ncrcmd resel_tag [ 6];
- ncrcmd jump_to_nexus [ 4];
+ ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT];
ncrcmd nexus_indirect [ 4];
ncrcmd resel_notag [ 4];
ncrcmd data_in [MAX_SCATTERL * 4];
@@ -1263,7 +1318,7 @@ struct scripth {
#endif
ncrcmd select_no_atn [ 8];
ncrcmd cancel [ 4];
- ncrcmd skip [ 9];
+ ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT];
ncrcmd skip2 [ 19];
ncrcmd par_err_data_in [ 6];
ncrcmd par_err_other [ 4];
@@ -1296,9 +1351,10 @@ struct scripth {
ncrcmd bad_i_t_l_q [ 4];
ncrcmd bad_target [ 8];
ncrcmd bad_status [ 8];
- ncrcmd start_ram [ 4];
+ ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT];
ncrcmd start_ram0 [ 4];
ncrcmd sto_restart [ 5];
+ ncrcmd wait_dma [ 2];
ncrcmd snooptest [ 9];
ncrcmd snoopend [ 2];
};
@@ -1324,6 +1380,7 @@ static lcb_p ncr_setup_lcb (ncb_p np, u_
static void ncr_getclock (ncb_p np, int mult);
static void ncr_selectclock (ncb_p np, u_char scntl3);
static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln);
+static void ncr_chip_reset (ncb_p np, int delay);
static void ncr_init (ncb_p np, int reset, char * msg, u_long code);
static int ncr_int_sbmc (ncb_p np);
static int ncr_int_par (ncb_p np);
@@ -1523,6 +1580,10 @@ static struct script script0 __initdata
RADDR (dsa),
PADDR (loadpos),
/*
+ ** Flush script prefetch if required
+ */
+ PREFETCH_FLUSH
+ /*
** then we do the actual copy.
*/
SCR_COPY (sizeof (struct head)),
@@ -1823,6 +1884,10 @@ static struct script script0 __initdata
SCR_COPY_F (4),
RADDR (dsa),
PADDR (cleanup0),
+ /*
+ ** Flush script prefetch if required
+ */
+ PREFETCH_FLUSH
SCR_COPY (sizeof (struct head)),
NADDR (header),
}/*-------------------------< CLEANUP0 >--------------------*/,{
@@ -1852,8 +1917,13 @@ static struct script script0 __initdata
/*
** ... signal completion to the host
*/
+#ifdef SIMULATED_INTFLY
+ SCR_INT,
+ SIR_INTFLY,
+#else
SCR_INT_FLY,
0,
+#endif
/*
** Auf zu neuen Schandtaten!
*/
@@ -1872,8 +1942,13 @@ static struct script script0 __initdata
SCR_INT,
SIR_DONE_OVERFLOW,
}/*------------------------< DONE_END >---------------------*/,{
+#ifdef SIMULATED_INTFLY
+ SCR_INT,
+ SIR_INTFLY,
+#else
SCR_INT_FLY,
0,
+#endif
SCR_COPY (4),
RADDR (temp),
PADDR (done_pos),
@@ -2051,6 +2126,10 @@ static struct script script0 __initdata
RADDR (dsa),
PADDR (loadpos1),
/*
+ ** Flush script prefetch if required
+ */
+ PREFETCH_FLUSH
+ /*
** then we do the actual copy.
*/
SCR_COPY (sizeof (struct head)),
@@ -2112,6 +2191,10 @@ static struct script script0 __initdata
SCR_COPY_F (4),
RADDR (temp),
PADDR (nexus_indirect),
+ /*
+ ** Flush script prefetch if required
+ */
+ PREFETCH_FLUSH
SCR_COPY (4),
}/*-------------------------< NEXUS_INDIRECT >-------------------*/,{
0,
@@ -2268,6 +2351,10 @@ static struct scripth scripth0 __initdat
RADDR (dsa),
PADDRH (skip2),
/*
+ ** Flush script prefetch if required
+ */
+ PREFETCH_FLUSH
+ /*
** then we do the actual copy.
*/
SCR_COPY (sizeof (struct head)),
@@ -2778,6 +2865,10 @@ static struct scripth scripth0 __initdat
SCR_COPY_F (4),
RADDR (scratcha),
PADDRH (start_ram0),
+ /*
+ ** Flush script prefetch if required
+ */
+ PREFETCH_FLUSH
SCR_COPY (sizeof (struct script)),
}/*-------------------------< START_RAM0 >--------------------*/,{
0,
@@ -2795,6 +2886,17 @@ static struct scripth scripth0 __initdat
PADDR (startpos),
SCR_JUMP,
PADDR (start),
+}/*-------------------------< WAIT_DMA >-------------------*/,{
+ /*
+ ** For HP Zalon/53c720 systems, the Zalon interface
+ ** between CPU and 53c720 does prefetches, which causes
+ ** problems with self modifying scripts. The problem
+ ** is overcome by calling a dummy subroutine after each
+ ** modification, to force a refetch of the script on
+ ** return from the subroutine.
+ */
+ SCR_RETURN,
+ 0,
}/*-------------------------< SNOOPTEST >-------------------*/,{
/*
** Read the variable.
@@ -3128,9 +3230,12 @@ static u_long div_10M[] =
#define burst_length(bc) (!(bc))? 0 : 1 << (bc)
/*
- * Burst code from io register bits.
+ * Burst code from io register bits. Burst enable is ctest0 for c720,
+ * ctest4 for others.
*/
-#define burst_code(dmode, ctest4, ctest5) \
+#define burst_code(dmode, ctest0, ctest4, ctest5) \
+ (np->device_id == PSEUDO_ZALON_720_ID) ? \
+ (ctest0) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + 1 : \
(ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
/*
@@ -3138,12 +3243,14 @@ static u_long div_10M[] =
*/
static inline void ncr_init_burst(ncb_p np, u_char bc)
{
- np->rv_ctest4 &= ~0x80;
+ u_char *be = (np->device_id == PSEUDO_ZALON_720_ID) ?
+ &np->rv_ctest0 : &np->rv_ctest4;
+ *be &= ~0x80;
np->rv_dmode &= ~(0x3 << 6);
np->rv_ctest5 &= ~0x4;
if (!bc) {
- np->rv_ctest4 |= 0x80;
+ *be |= 0x80;
}
else {
--bc;
@@ -3220,6 +3327,7 @@ static int __init ncr_prepare_setting(nc
np->sv_scntl3 = INB(nc_scntl3) & 0x07;
np->sv_dmode = INB(nc_dmode) & 0xce;
np->sv_dcntl = INB(nc_dcntl) & 0xa8;
+ np->sv_ctest0 = INB(nc_ctest0) & 0x84;
np->sv_ctest3 = INB(nc_ctest3) & 0x01;
np->sv_ctest4 = INB(nc_ctest4) & 0x80;
np->sv_ctest5 = INB(nc_ctest5) & 0x24;
@@ -3306,10 +3414,11 @@ static int __init ncr_prepare_setting(nc
np->rv_scntl0 = np->sv_scntl0;
np->rv_dmode = np->sv_dmode;
np->rv_dcntl = np->sv_dcntl;
+ np->rv_ctest0 = np->sv_ctest0;
np->rv_ctest3 = np->sv_ctest3;
np->rv_ctest4 = np->sv_ctest4;
np->rv_ctest5 = np->sv_ctest5;
- burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
+ burst_max = burst_code(np->sv_dmode, np->sv_ctest0, np->sv_ctest4, np->sv_ctest5);
#else
/*
@@ -3317,7 +3426,7 @@ static int __init ncr_prepare_setting(nc
*/
burst_max = driver_setup.burst_max;
if (burst_max == 255)
- burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
+ burst_max = burst_code(np->sv_dmode, np->sv_ctest0, np->sv_ctest4, np->sv_ctest5);
if (burst_max > 7)
burst_max = 7;
if (burst_max > np->maxburst)
@@ -3340,6 +3449,12 @@ static int __init ncr_prepare_setting(nc
np->rv_ctest3 |= WRIE; /* Write and Invalidate */
if (np->features & FE_DFS)
np->rv_ctest5 |= DFS; /* Dma Fifo Size */
+ if (np->features & FE_MUX)
+ np->rv_ctest4 |= MUX; /* Host bus multiplex mode */
+ if (np->features & FE_EA)
+ np->rv_dcntl |= EA; /* Enable ACK */
+ if (np->features & FE_EHP)
+ np->rv_ctest0 |= EHP; /* Even host parity */
/*
** Select some other
@@ -3539,6 +3654,7 @@ ncr_attach (Scsi_Host_Template *tpnt, in
ncr_nvram *nvram = device->nvram;
int i;
+#ifndef ENABLE_SCSI_ZALON
printk(KERN_INFO "ncr53c%s-%d: rev 0x%x on pci bus %d device %d function %d "
#ifdef __sparc__
"irq %s\n",
@@ -3553,6 +3669,7 @@ ncr_attach (Scsi_Host_Template *tpnt, in
#else
device->slot.irq);
#endif
+#endif
/*
** Allocate host_data structure
@@ -3650,7 +3767,9 @@ ncr_attach (Scsi_Host_Template *tpnt, in
** Try to map the controller chip into iospace.
*/
+#ifndef ENABLE_SCSI_ZALON
request_region(device->slot.io_port, 128, "ncr53c8xx");
+#endif
np->base_io = device->slot.io_port;
#ifdef SCSI_NCR_NVRAM_SUPPORT
@@ -3707,7 +3826,9 @@ ncr_attach (Scsi_Host_Template *tpnt, in
instance->dma_channel = 0;
instance->cmd_per_lun = MAX_TAGS;
instance->can_queue = (MAX_START-4);
+#ifndef ENABLE_SCSI_ZALON
scsi_set_pci_device(instance, device->pdev);
+#endif
#ifdef SCSI_NCR_INTEGRITY_CHECKING
np->check_integrity = 0;
@@ -3762,10 +3883,7 @@ ncr_attach (Scsi_Host_Template *tpnt, in
/*
** Reset chip.
*/
-
- OUTB (nc_istat, SRST);
- UDELAY (100);
- OUTB (nc_istat, 0 );
+ ncr_chip_reset(np, 100);
/*
** Now check the cache handling of the pci chipset.
@@ -3882,7 +4000,9 @@ attach_error:
#ifdef DEBUG_NCR53C8XX
printk(KERN_DEBUG "%s: releasing IO region %x[%d]\n", ncr_name(np), np->base_io, 128);
#endif
+#ifndef ENABLE_SCSI_ZALON
release_region(np->base_io, 128);
+#endif
}
if (np->irq) {
#ifdef DEBUG_NCR53C8XX
@@ -3907,7 +4027,7 @@ unregister:
scsi_unregister(instance);
return -1;
- }
+}
/*==========================================================
@@ -4694,9 +4814,7 @@ static int ncr_reset_scsi_bus(ncb_p np,
"command processing suspended for %d seconds\n",
ncr_name(np), settle_delay);
- OUTB (nc_istat, SRST);
- UDELAY (100);
- OUTB (nc_istat, 0);
+ ncr_chip_reset(np, 100);
UDELAY (2000); /* The 895 needs time for the bus mode to settle */
if (enab_int)
OUTW (nc_sien, RST);
@@ -4705,7 +4823,8 @@ static int ncr_reset_scsi_bus(ncb_p np,
** properly set IRQ mode, prior to resetting the bus.
*/
OUTB (nc_stest3, TE);
- OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
+ if (np->device_id != PSEUDO_ZALON_720_ID)
+ OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
OUTB (nc_scntl1, CRST);
UDELAY (200);
@@ -4912,6 +5031,10 @@ static int ncr_detach(ncb_p np)
lcb_p lp;
int target, lun;
int i;
+ char inst_name[16];
+
+ /* Local copy so we don't access np after freeing it! */
+ strncpy(inst_name, ncr_name(np), 16);
printk("%s: releasing host resources\n", ncr_name(np));
@@ -4958,12 +5081,11 @@ static int ncr_detach(ncb_p np)
*/
printk("%s: resetting chip\n", ncr_name(np));
- OUTB (nc_istat, SRST);
- UDELAY (100);
- OUTB (nc_istat, 0 );
+ ncr_chip_reset(np, 100);
OUTB(nc_dmode, np->sv_dmode);
OUTB(nc_dcntl, np->sv_dcntl);
+ OUTB(nc_ctest0, np->sv_ctest0);
OUTB(nc_ctest3, np->sv_ctest3);
OUTB(nc_ctest4, np->sv_ctest4);
OUTB(nc_ctest5, np->sv_ctest5);
@@ -4986,7 +5108,9 @@ static int ncr_detach(ncb_p np)
#ifdef DEBUG_NCR53C8XX
printk("%s: releasing IO region %x[%d]\n", ncr_name(np), np->base_io, 128);
#endif
+#ifndef ENABLE_SCSI_ZALON
release_region(np->base_io, 128);
+#endif
/*
** Free allocated ccb(s)
@@ -5031,7 +5155,7 @@ static int ncr_detach(ncb_p np)
m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
m_free_dma(np, sizeof(struct ncb), "NCB");
- printk("%s: host resources successfully released\n", ncr_name(np));
+ printk("%s: host resources successfully released\n", inst_name);
return 1;
}
@@ -5423,6 +5547,27 @@ void ncr_wakeup (ncb_p np, u_long code)
}
}
+/*
+** Reset ncr chip.
+*/
+
+/* Some initialisation must be done immediately following reset, for 53c720,
+ * at least. EA (dcntl bit 5) isn't set here as it is set once only in
+ * the _detect function.
+ */
+static void ncr_chip_reset(ncb_p np, int delay)
+{
+ OUTB (nc_istat, SRST);
+ UDELAY (delay);
+ OUTB (nc_istat, 0 );
+
+ if (np->features & FE_EHP)
+ OUTB (nc_ctest0, EHP);
+ if (np->features & FE_MUX)
+ OUTB (nc_ctest4, MUX);
+}
+
+
/*==========================================================
**
**
@@ -5469,6 +5614,7 @@ void ncr_init (ncb_p np, int reset, char
np->squeueput = 0;
np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop));
+#ifdef SCSI_NCR_CCB_DONE_SUPPORT
/*
** Clear Done Queue
*/
@@ -5477,6 +5623,7 @@ void ncr_init (ncb_p np, int reset, char
np->scripth0->done_queue[5*i + 4] =
cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
}
+#endif
/*
** Start at first entry.
@@ -5495,8 +5642,11 @@ void ncr_init (ncb_p np, int reset, char
** Init chip.
*/
- OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
- UDELAY (2000); /* The 895 needs time for the bus mode to settle */
+ /*
+ ** Remove reset; big delay because the 895 needs time for the
+ ** bus mode to settle
+ */
+ ncr_chip_reset(np, 2000);
OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
/* full arb., ena parity, par->ATN */
@@ -5511,6 +5661,7 @@ void ncr_init (ncb_p np, int reset, char
OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
+ OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */
OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
@@ -7095,6 +7246,18 @@ void ncr_int_sir (ncb_p np)
if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
switch (num) {
+ case SIR_INTFLY:
+ /*
+ ** This is used for HP Zalon/53c720 where INTFLY
+ ** operation is currently broken.
+ */
+ ncr_wakeup_done(np);
+#ifdef SCSI_NCR_CCB_DONE_SUPPORT
+ OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8);
+#else
+ OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start));
+#endif
+ return;
case SIR_RESEL_NO_MSG_IN:
case SIR_RESEL_NO_IDENTIFY:
/*
@@ -7841,15 +8004,23 @@ static void ncr_init_tcb (ncb_p np, u_ch
*/
tp->getscr[0] = cpu_to_scr(copy_1);
tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval));
+#ifdef SCSI_NCR_BIG_ENDIAN
+ tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3);
+#else
tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer));
-
+#endif
+
/*
** Load the timing register.
** COPY @(tp->wval), @(scntl3)
*/
tp->getscr[3] = cpu_to_scr(copy_1);
tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval));
+#ifdef SCSI_NCR_BIG_ENDIAN
+ tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3);
+#else
tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3));
+#endif
/*
** Get the IDENTIFY message and the lun.
@@ -7878,10 +8049,17 @@ static void ncr_init_tcb (ncb_p np, u_ch
/*
** These assert's should be moved at driver initialisations.
*/
+#ifdef SCSI_NCR_BIG_ENDIAN
+ assert (( (offsetof(struct ncr_reg, nc_sxfer) ^
+ offsetof(struct tcb , sval )) &3) == 3);
+ assert (( (offsetof(struct ncr_reg, nc_scntl3) ^
+ offsetof(struct tcb , wval )) &3) == 3);
+#else
assert (( (offsetof(struct ncr_reg, nc_sxfer) ^
offsetof(struct tcb , sval )) &3) == 0);
assert (( (offsetof(struct ncr_reg, nc_scntl3) ^
offsetof(struct tcb , wval )) &3) == 0);
+#endif
}
@@ -8122,14 +8300,10 @@ static int ncr_scatter(ncb_p np, ccb_p c
segment = 1;
}
}
- else {
+ else if (use_sg <= MAX_SCATTER) {
struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
use_sg = map_scsi_sg_data(np, cmd);
- if (use_sg > MAX_SCATTER) {
- unmap_scsi_data(np, cmd);
- return -1;
- }
data = &data[MAX_SCATTER - use_sg];
while (segment < use_sg) {
@@ -8142,6 +8316,9 @@ static int ncr_scatter(ncb_p np, ccb_p c
++segment;
}
}
+ else {
+ return -1;
+ }
return segment;
}
@@ -8226,9 +8403,7 @@ static int __init ncr_snooptest (struct
/*
** Reset ncr chip
*/
- OUTB (nc_istat, SRST);
- UDELAY (100);
- OUTB (nc_istat, 0 );
+ ncr_chip_reset(np, 100);
/*
** check for timeout
*/
@@ -8455,7 +8630,7 @@ static void __init ncr_getclock (ncb_p n
if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
unsigned f2;
- OUTB(nc_istat, SRST); UDELAY (5); OUTB(nc_istat, 0);
+ ncr_chip_reset(np, 5);
(void) ncrgetfreq (np, 11); /* throw away first result */
f1 = ncrgetfreq (np, 11);
@@ -9202,6 +9377,7 @@ __setup("ncr53c8xx=", ncr53c8xx_setup);
*/
static u_short ncr_chip_ids[] __initdata = {
+ PSEUDO_ZALON_720_ID,
PCI_DEVICE_ID_NCR_53C810,
PCI_DEVICE_ID_NCR_53C815,
PCI_DEVICE_ID_NCR_53C820,
@@ -9216,6 +9392,74 @@ static u_short ncr_chip_ids[] __initda
PCI_DEVICE_ID_NCR_53C1510D
};
+#ifdef ENABLE_SCSI_ZALON
+/* Attach a 53c720 interfaced via Zalon chip on HP boxes. */
+int zalon_attach(Scsi_Host_Template *tpnt, unsigned long io_port,
+ struct parisc_device *dev, int irq, int unit)
+{
+ u_short device_id;
+ u_char revision;
+ int i;
+ ncr_chip *chip;
+ ncr_device device;
+
+ tpnt->proc_name = NAME53C8XX;
+ tpnt->proc_info = ncr53c8xx_proc_info;
+
+#if defined(SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT) && defined(MODULE)
+ if (ncr53c8xx)
+ ncr53c8xx_setup(ncr53c8xx);
+#endif
+
+#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
+ ncr_debug = driver_setup.debug;
+#endif
+ if (initverbose >= 2)
+ ncr_print_driver_setup();
+
+ memset(&device, 0, sizeof(ncr_device));
+ chip = 0;
+ device_id = PSEUDO_ZALON_720_ID;
+ revision = 0;
+ for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) { if (device_id != ncr_chip_table[i].device_id)
+ continue;
+ chip = &device.chip;
+ memcpy(chip, &ncr_chip_table[i], sizeof(*chip));
+ chip->revision_id = revision;
+ break;
+ }
+
+ if (!chip) {
+ printk(NAME53C8XX ": not initializing, device not supported\n"); return -1;
+ }
+
+ /* Fix some features according to driver setup. */
+ driver_setup.diff_support = 2;
+
+ /* The following three are needed before any other access. */
+ writeb(0x20, io_port + 0x38); /* DCNTL_REG, EA */
+ writeb(0x04, io_port + 0x1b); /* CTEST0_REG, EHP */
+ writeb(0x80, io_port + 0x22); /* CTEST4_REG, MUX */
+
+ /* Initialise ncr_device structure with items required by ncr_attach. */
+ device.host_id = driver_setup.host_id;
+ device.pdev = ccio_get_fake(dev);
+ device.slot.bus = 0;
+ device.slot.device_fn = 0;
+ device.slot.base = (u_long)io_port;
+ device.slot.base_c = (u_long)io_port;
+ device.slot.base_2 = 0;
+ device.slot.base_2_c = 0;
+ device.slot.io_port = io_port;
+ device.slot.irq = irq;
+ device.attach_done = 0;
+
+ printk(KERN_INFO NAME53C8XX ": 53c%s detected\n", device.chip.name);
+
+ return ncr_attach(tpnt, unit, &device);
+}
+#endif
+
/*==========================================================
**
** Chip detection entry point.
@@ -9265,6 +9509,10 @@ MODULE_LICENSE("GPL");
static
#endif
#if LINUX_VERSION_CODE >= LinuxVersionCode(2,4,0) || defined(MODULE)
+#ifdef ENABLE_SCSI_ZALON
+Scsi_Host_Template driver_template = SCSI_ZALON;
+#else
Scsi_Host_Template driver_template = NCR53C8XX;
+#endif
#include "scsi_module.c"
#endif
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/sym53c8xx.c parisc-2.5/drivers/scsi/sym53c8xx.c
--- linus-2.5/drivers/scsi/sym53c8xx.c Thu Oct 31 17:35:47 2002
+++ parisc-2.5/drivers/scsi/sym53c8xx.c Thu Oct 31 17:39:40 2002
@@ -4901,6 +4901,11 @@ static int __init ncr_prepare_setting(nc
u_long period;
int i;
+#ifdef CONFIG_PARISC
+ char scsi_mode = -1;
+ struct hardware_path hwpath;
+#endif
+
/*
** Wide ?
*/
@@ -4972,6 +4977,31 @@ static int __init ncr_prepare_setting(nc
*/
period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
+
+#if defined(CONFIG_PARISC)
+ /* Host firmware (PDC) keeps a table for crippling SCSI capabilities.
+ * Many newer machines export one channel of 53c896 chip
+ * as SE, 50-pin HD. Also used for Multi-initiator SCSI clusters
+ * to set the SCSI Initiator ID.
+ */
+ get_pci_node_path(np->pdev, &hwpath);
+ if (pdc_get_initiator(&hwpath, &np->myaddr, &period, &np->maxwide, &scsi_mode))
+ {
+ if (np->maxwide)
+ np->features |= FE_WIDE;
+ if (scsi_mode >= 0) {
+ /* C3000 PDC reports period/mode */
+ driver_setup.diff_support = 0;
+ switch(scsi_mode) {
+ case 0: np->scsi_mode = SMODE_SE; break;
+ case 1: np->scsi_mode = SMODE_HVD; break;
+ case 2: np->scsi_mode = SMODE_LVD; break;
+ default: break;
+ }
+ }
+ }
+#endif
+
if (period <= 250) np->minsync = 10;
else if (period <= 303) np->minsync = 11;
else if (period <= 500) np->minsync = 12;
@@ -12958,6 +12988,7 @@ if (sym53c8xx)
}
if (i != count) /* Ignore this device if we already have it */
continue;
+ pci_set_master(pcidev);
devp = &devtbl[count];
devp->host_id = driver_setup.host_id;
devp->attach_done = 0;
@@ -13201,9 +13232,9 @@ sym53c8xx_pci_init(Scsi_Host_Template *t
return -1;
}
-#ifdef __powerpc__
+#if defined(__powerpc__) || defined(__hppa__)
/*
- ** Fix-up for power/pc.
+ ** Fix-up for power/pc and hppa.
** Should not be performed by the driver.
*/
if ((command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/sym53c8xx_2/sym_glue.c parisc-2.5/drivers/scsi/sym53c8xx_2/sym_glue.c
--- linus-2.5/drivers/scsi/sym53c8xx_2/sym_glue.c Mon Oct 21 05:18:30 2002
+++ parisc-2.5/drivers/scsi/sym53c8xx_2/sym_glue.c Mon Oct 21 05:34:18 2002
@@ -1876,7 +1876,7 @@ static int sym_setup_bus_dma_mask(hcb_p
sym_name(np));
}
else {
- if (!pci_set_dma_mask(np->s.device, 0xffffffffUL))
+ if (pci_set_dma_mask(np->s.device, 0xffffffffUL))
goto out_err32;
}
}
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/sym53c8xx_2/sym_malloc.c parisc-2.5/drivers/scsi/sym53c8xx_2/sym_malloc.c
--- linus-2.5/drivers/scsi/sym53c8xx_2/sym_malloc.c Thu Jul 18 09:53:28 2002
+++ parisc-2.5/drivers/scsi/sym53c8xx_2/sym_malloc.c Thu Jul 25 00:39:33 2002
@@ -143,12 +143,15 @@ static void ___sym_mfree(m_pool_p mp, vo
a = (m_addr_t) ptr;
while (1) {
-#ifdef SYM_MEM_FREE_UNUSED
if (s == SYM_MEM_CLUSTER_SIZE) {
+#ifdef SYM_MEM_FREE_UNUSED
M_FREE_MEM_CLUSTER(a);
+#else
+ ((m_link_p) a)->next = h[i].next;
+ h[i].next = (m_link_p) a;
+#endif
break;
}
-#endif
b = a ^ s;
q = &h[i];
while (q->next && q->next != (m_link_p) b) {
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/sym53c8xx_defs.h parisc-2.5/drivers/scsi/sym53c8xx_defs.h
--- linus-2.5/drivers/scsi/sym53c8xx_defs.h Thu Jul 18 09:53:27 2002
+++ parisc-2.5/drivers/scsi/sym53c8xx_defs.h Fri Oct 18 08:25:44 2002
@@ -51,6 +51,13 @@
** NVRAM detection and reading.
** Copyright (C) 1997 Richard Waltham <
[email protected]>
**
+** Added support for MIPS big endian systems.
+** Carsten Langgaard,
[email protected]
+** Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+**
+** Added support for HP PARISC big endian systems.
+** Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+**
*******************************************************************************
*/
@@ -78,8 +85,10 @@
/*
* No more an option, enabled by default.
*/
-#ifndef CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT
-#define CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT
+#ifndef ENABLE_SCSI_ZALON
+# ifndef CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT
+# define CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT
+# endif
#endif
/*
@@ -181,6 +190,8 @@
#endif
#elif defined(__sparc__)
#undef SCSI_NCR_IOMAPPED
+#elif defined(__hppa__) && defined(ENABLE_SCSI_ZALON)
+#undef SCSI_NCR_IOMAPPED
#endif
/*
@@ -379,16 +390,24 @@
#define readb_raw readb
#define writeb_raw writeb
-#if defined(__hppa__)
-#define readw_l2b(a) le16_to_cpu(readw(a))
-#define readl_l2b(a) le32_to_cpu(readl(a))
-#define writew_b2l(v,a) writew(cpu_to_le16(v),a)
-#define writel_b2l(v,a) writel(cpu_to_le32(v),a)
-#else /* Other bid-endian */
+#if defined(SCSI_NCR_BIG_ENDIAN)
+#define readw_l2b __raw_readw
+#define readl_l2b __raw_readl
+#define writew_b2l __raw_writew
+#define writel_b2l __raw_writel
+#define readw_raw __raw_readw
+#define readl_raw(a) __raw_readl((unsigned long)(a))
+#define writew_raw __raw_writew
+#define writel_raw(v,a) __raw_writel(v,(unsigned long)(a))
+#else /* Other big-endian */
#define readw_l2b readw
#define readl_l2b readl
#define writew_b2l writew
#define writel_b2l writel
+#define readw_raw readw
+#define readl_raw readl
+#define writew_raw writew
+#define writel_raw writel
#endif
#else /* little endian */
@@ -417,9 +436,11 @@
#endif
#endif
+#if !defined(__hppa__) && !defined(__mips__)
#ifdef SCSI_NCR_BIG_ENDIAN
#error "The NCR in BIG ENDIAN addressing mode is not (yet) supported"
#endif
+#endif
/*
@@ -572,10 +593,20 @@
#else
+#ifdef ENABLE_SCSI_ZALON
+/* Only 8 or 32 bit transfers allowed */
+#define INW_OFF(o) (readb((char *)np->reg + ncr_offw(o)) << 8 | readb((char *)np->reg + ncr_offw(o) + 1))
+#else
#define INW_OFF(o) readw_raw((char *)np->reg + ncr_offw(o))
+#endif
#define INL_OFF(o) readl_raw((char *)np->reg + (o))
+#ifdef ENABLE_SCSI_ZALON
+/* Only 8 or 32 bit transfers allowed */
+#define OUTW_OFF(o, val) do { writeb((char)((val) >> 8), (char *)np->reg + ncr_offw(o)); writeb((char)(val), (char *)np->reg + ncr_offw(o) + 1); } while (0)
+#else
#define OUTW_OFF(o, val) writew_raw((val), (char *)np->reg + ncr_offw(o))
+#endif
#define OUTL_OFF(o, val) writel_raw((val), (char *)np->reg + (o))
#endif
@@ -623,6 +654,10 @@
** NCR53C8XX Device Ids
*/
+#ifndef PSEUDO_ZALON_720_ID
+#define PSEUDO_ZALON_720_ID 0x5a00
+#endif
+
#ifndef PCI_DEVICE_ID_NCR_53C810
#define PCI_DEVICE_ID_NCR_53C810 1
#endif
@@ -726,6 +761,9 @@ typedef struct {
#define FE_DAC (1<<24) /* Support DAC cycles (64 bit addressing) */
#define FE_ISTAT1 (1<<25) /* Have ISTAT1, MBOX0, MBOX1 registers */
#define FE_DAC_IN_USE (1<<26) /* Platform does DAC cycles */
+#define FE_EHP (1<<27) /* 720: Even host parity */
+#define FE_MUX (1<<28) /* 720: Multiplexed bus */
+#define FE_EA (1<<29) /* 720: Enable Ack */
#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)
#define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_ULTRA2|FE_DBLR|FE_QUAD|F_CLK80)
@@ -747,6 +785,9 @@ typedef struct {
#define SCSI_NCR_CHIP_TABLE \
{ \
+ {PSEUDO_ZALON_720_ID, 0x0f, "720", 3, 8, 4, \
+ FE_WIDE|FE_DIFF|FE_EHP|FE_MUX|FE_EA} \
+ , \
{PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, \
FE_ERL} \
, \
@@ -819,6 +860,7 @@ typedef struct {
*/
#define SCSI_NCR_CHIP_IDS \
{ \
+ PSEUDO_ZALON_720_ID, \
PCI_DEVICE_ID_NCR_53C810, \
PCI_DEVICE_ID_NCR_53C815, \
PCI_DEVICE_ID_NCR_53C820, \
@@ -1170,6 +1212,7 @@ struct ncr_reg {
/*17*/ u_char nc_mbox1; /* 896 and later cores only */
/*18*/ u_char nc_ctest0;
+ #define EHP 0x04 /* 720 even host parity */
/*19*/ u_char nc_ctest1;
/*1a*/ u_char nc_ctest2;
@@ -1187,6 +1230,7 @@ struct ncr_reg {
/*20*/ u_char nc_dfifo;
/*21*/ u_char nc_ctest4;
+ #define MUX 0x80 /* 720 host bus multiplex mode */
#define BDIS 0x80 /* mod: burst disable */
#define MPEE 0x08 /* mod: master parity error enable */
@@ -1219,6 +1263,7 @@ struct ncr_reg {
#define CLSE 0x80 /* mod: cache line size enable */
#define PFF 0x40 /* cmd: pre-fetch flush */
#define PFEN 0x20 /* mod: pre-fetch enable */
+ #define EA 0x20 /* mod: 720 enable-ack */
#define SSM 0x10 /* mod: single step mode */
#define IRQM 0x08 /* mod: irq mode (1 = totem pole !) */
#define STD 0x04 /* cmd: start dma mode */
@@ -1261,6 +1306,7 @@ struct ncr_reg {
/*4e*/ u_char nc_stest2;
#define ROF 0x40 /* reset scsi offset (after gross error!) */
+ #define DIF 0x20 /* 720 SCSI differential mode */
#define EXT 0x02 /* extended filtering */
/*4f*/ u_char nc_stest3;
@@ -1439,12 +1485,22 @@ struct scr_tblmove {
#define SCR_SEL_TBL 0x42000000
#define SCR_SEL_TBL_ATN 0x43000000
+
+#ifdef SCSI_NCR_BIG_ENDIAN
+struct scr_tblsel {
+ u_char sel_scntl3;
+ u_char sel_id;
+ u_char sel_sxfer;
+ u_char sel_scntl4;
+};
+#else
struct scr_tblsel {
u_char sel_scntl4;
u_char sel_sxfer;
u_char sel_id;
u_char sel_scntl3;
};
+#endif
#define SCR_JMP_REL 0x04000000
#define SCR_ID(id) (((u_int32)(id)) << 16)
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/zalon.c parisc-2.5/drivers/scsi/zalon.c
--- linus-2.5/drivers/scsi/zalon.c Wed Dec 31 17:00:00 1969
+++ parisc-2.5/drivers/scsi/zalon.c Fri Nov 1 08:28:36 2002
@@ -0,0 +1,163 @@
+/*
+ * Zalon 53c7xx device driver.
+ * By Richard Hirst (
[email protected])
+ */
+
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/stat.h>
+#include <linux/mm.h>
+#include <linux/blk.h>
+#include <linux/sched.h>
+#include <linux/version.h>
+#include <linux/config.h>
+#include <linux/module.h>
+
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/delay.h>
+#include <asm/io.h>
+
+#include "../parisc/gsc.h"
+#include "scsi.h"
+#include "hosts.h"
+
+/*
+ * ** Define the BSD style u_int32 and u_int64 type.
+ * ** Are in fact u_int32_t and u_int64_t :-)
+ * */
+typedef u32 u_int32;
+typedef u64 u_int64;
+typedef u_long vm_offset_t;
+
+#include "zalon.h"
+
+
+/* hosts_* are kluges to pass info between the zalon7xx_detected()
+** and the register_parisc_driver() callbacks.
+*/
+static Scsi_Host_Template *hosts_tptr;
+static int hosts_used=0;
+static int zalon_id = 0;
+
+extern int zalon_attach(Scsi_Host_Template *tpnt,
+ unsigned long base_addr,
+ struct parisc_device *dev,
+ int irq_vector,
+ int unit
+ );
+
+
+#if 0
+/* FIXME:
+ * Is this function dead code? or is someone planning on using it in the
+ * future. The clock = (int) pdc_result[16] does not look correct to
+ * me ... I think it should be iodc_data[16]. Since this cause a compile
+ * error with the new encapsulated PDC, I'm not compiling in this function.
+ * - RB
+ */
+/* poke SCSI clock out of iodc data */
+
+static u8 iodc_data[32] __attribute__ ((aligned (64)));
+static unsigned long pdc_result[32] __attribute__ ((aligned (16))) ={0,0,0,0};
+
+static int
+lasi_scsi_clock(void * hpa, int defaultclock)
+{
+ int clock, status;
+
+ status = pdc_iodc_read(&pdc_result, hpa, 0, &iodc_data, 32 );
+ if (status == PDC_RET_OK) {
+ clock = (int) pdc_result[16];
+ } else {
+ printk(KERN_WARNING "%s: pdc_iodc_read returned %d\n", __FUNCTION__, status);
+ clock = defaultclock;
+ }
+
+ printk(KERN_DEBUG "%s: SCSI clock %d\n", __FUNCTION__, clock);
+ return clock;
+}
+#endif
+
+static int __init
+zalon_scsi_callback(struct parisc_device *dev)
+{
+ struct gsc_irq gsc_irq;
+ u32 zalon_vers;
+ int irq;
+ unsigned long zalon = dev->hpa;
+
+ __raw_writel(CMD_RESET, zalon + IO_MODULE_IO_COMMAND);
+ while (!(__raw_readl(zalon + IO_MODULE_IO_STATUS) & IOSTATUS_RY))
+ ;
+ __raw_writel(IOIIDATA_MINT5EN | IOIIDATA_PACKEN | IOIIDATA_PREFETCHEN,
+ zalon + IO_MODULE_II_CDATA);
+
+ /* XXX: Save the Zalon version for bug workarounds? */
+ zalon_vers = __raw_readl(dev->hpa + IO_MODULE_II_CDATA) & 0x07000000;
+ zalon_vers >>= 24;
+
+ /* Setup the interrupts first.
+ ** Later on request_irq() will register the handler.
+ */
+ irq = gsc_alloc_irq(&gsc_irq);
+
+ printk("%s: Zalon vers field is 0x%x, IRQ %d\n", __FUNCTION__,
+ zalon_vers, irq);
+
+ __raw_writel(gsc_irq.txn_addr | gsc_irq.txn_data, dev->hpa + IO_MODULE_EIM);
+
+ if ( zalon_vers == 0)
+ printk(KERN_WARNING "%s: Zalon 1.1 or earlier\n", __FUNCTION__);
+
+ /*
+ ** zalon_attach: returns -1 on failure, 0 on success
+ */
+ hosts_used = zalon_attach(hosts_tptr, dev->hpa + GSC_SCSI_ZALON_OFFSET,
+ dev, irq, zalon_id);
+
+ if (hosts_used == 0)
+ zalon_id++;
+
+ hosts_used = (hosts_used == 0);
+ return (hosts_used == 0);
+}
+
+static struct parisc_device_id zalon_tbl[] = {
+ { HPHW_A_DMA, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x00089 },
+ { 0, }
+};
+
+MODULE_DEVICE_TABLE(parisc, zalon_tbl);
+
+static struct parisc_driver zalon_driver = {
+ name: "GSC SCSI (Zalon)",
+ id_table: zalon_tbl,
+ probe: zalon_scsi_callback,
+};
+
+int zalon7xx_detect(Scsi_Host_Template *tpnt)
+{
+ /* "pass" the parameter to the callback functions */
+ hosts_tptr = tpnt;
+ hosts_used = 0;
+
+ /* claim all zalon cards. */
+ register_parisc_driver(&zalon_driver);
+
+ /* Check if any callbacks actually found/claimed anything. */
+ return (hosts_used != 0);
+}
+
+#ifdef MODULE
+extern int ncr53c8xx_release(struct Scsi_Host *host);
+
+int zalon7xx_release(struct Scsi_Host *host)
+{
+ ncr53c8xx_release(host);
+ unregister_parisc_driver(&zalon_driver);
+ return 1;
+}
+#endif
diff -urpNX build-tools/dontdiff linus-2.5/drivers/scsi/zalon.h parisc-2.5/drivers/scsi/zalon.h
--- linus-2.5/drivers/scsi/zalon.h Wed Dec 31 17:00:00 1969
+++ parisc-2.5/drivers/scsi/zalon.h Fri Nov 1 08:28:36 2002
@@ -0,0 +1,56 @@
+#ifndef ZALON7XX_H
+#define ZALON7XX_H
+
+#include <linux/types.h>
+
+#include "sym53c8xx_defs.h"
+
+extern int zalon7xx_detect(Scsi_Host_Template *);
+
+#include <scsi/scsicam.h>
+
+extern struct proc_dir_entry proc_scsi_zalon7xx;
+
+/* borrowed from drivers/scsi/ncr53c8xx.h */
+int zalon7xx_detect(Scsi_Host_Template *tpnt);
+const char *ncr53c8xx_info(struct Scsi_Host *host);
+int ncr53c8xx_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
+
+#ifdef MODULE
+int zalon7xx_release(struct Scsi_Host *);
+#else
+#define zalon7xx_release NULL
+#endif
+
+#define SCSI_ZALON { proc_name: "zalon720", \
+ detect: zalon7xx_detect, \
+ release: zalon7xx_release, \
+ info: ncr53c8xx_info, \
+ queuecommand: ncr53c8xx_queue_command,\
+ bios_param: scsicam_bios_param, \
+ can_queue: SCSI_NCR_CAN_QUEUE, \
+ this_id: 7, \
+ sg_tablesize: SCSI_NCR_SG_TABLESIZE, \
+ cmd_per_lun: SCSI_NCR_CMD_PER_LUN, \
+ use_clustering: DISABLE_CLUSTERING}
+
+
+#define GSC_SCSI_ZALON_OFFSET 0x800
+
+#define IO_MODULE_EIM (1*4)
+#define IO_MODULE_DC_ADATA (2*4)
+#define IO_MODULE_II_CDATA (3*4)
+#define IO_MODULE_IO_COMMAND (12*4)
+#define IO_MODULE_IO_STATUS (13*4)
+
+#define IOSTATUS_RY 0x40
+#define IOSTATUS_FE 0x80
+#define IOIIDATA_SMINT5L 0x40000000
+#define IOIIDATA_MINT5EN 0x20000000
+#define IOIIDATA_PACKEN 0x10000000
+#define IOIIDATA_PREFETCHEN 0x08000000
+#define IOIIDATA_IOII 0x00000020
+
+#define CMD_RESET 5
+
+#endif /* ZALON7XX_H */
