1. Added a define for CPU_ORDER_LOCK so that when using MMAPed I/O we are
gauranteed that the processor won't re-order our inb/outb instructions.
2. Fixed two problems during the detection sequence.
3. Fixed a problem with the aic7xxx_reset() function that could end up
leaving interrupts disabled on your system until you hit the reset
switch.
4. General code changes in preparation for 5.0.12. These include starting
to change the code over to use different locking mechanisms under
2.0.x and 2.1.x, especially in regards to SMP systems.